Senior ASIC Verification Engineer at BTA Design Services
Toronto, ON, Canada -
Full Time


Start Date

Immediate

Expiry Date

13 Oct, 25

Salary

0.0

Posted On

14 Jul, 25

Experience

7 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

Verilog, Scripting Languages, Systemverilog, Communication Skills, Assertions

Industry

Information Technology/IT

Description

ABOUT US:

Headquartered in Ottawa, BTA Design serves the electronic design community in Canada and beyond, specializing in ASIC and FPGA design and verification, and embedded software development services. We augment and enhance our clients’ teams and accelerate the development of complete designs.
We’re adaptable and efficient, with a brilliant staff at our core. We aim to be the best at what we do.
Our success continues to fuel growth. We are currently searching globally for a number of key technical resources, including a Senior ASIC Verification Engineer.

Key Qualifications:

  • 7+ years of experience in ASIC verification.
  • Highly skilled in Verilog, SystemVerilog, other hardware description languages, and scripting languages.
  • Significant experience with UVM / OVM methodologies.
  • Experience with ARM / MIPS / RISC-V architecture.
  • Familiarity with constrained random verification techniques, assertions and functional coverage.
  • Experience with Advanced Microcontroller Bus Architecture is an asset
  • Experience with APB / AXI and processor peripheral interfaces is an asset.
  • Team player – excellent interpersonal and communication skills
Responsibilities
  • Perform design verification of large ASICs that integrate custom, high speed computational accelerators with 3rd-party SoC IP blocks.
  • Develop verification environment architecture using UVM.
  • Document test environment associations and write test cases.
  • Support lab bring-up with direct test cases.
  • Perform code and functional coverage.

Key Qualifications:

  • 7+ years of experience in ASIC verification.
  • Highly skilled in Verilog, SystemVerilog, other hardware description languages, and scripting languages.
  • Significant experience with UVM / OVM methodologies.
  • Experience with ARM / MIPS / RISC-V architecture.
  • Familiarity with constrained random verification techniques, assertions and functional coverage.
  • Experience with Advanced Microcontroller Bus Architecture is an asset
  • Experience with APB / AXI and processor peripheral interfaces is an asset.
  • Team player – excellent interpersonal and communication skills.
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