Start Date
Immediate
Expiry Date
19 Jul, 26
Salary
0.0
Posted On
20 Apr, 26
Experience
5 year(s) or above
Remote Job
Yes
Telecommute
Yes
Sponsor Visa
No
Skills
SystemVerilog, UVM, Verification planning, Test bench development, Python, Perl, TCL, Mixed-signal design, Debugging, Constrained random verification, Assertion-based verification, Silicon bring-up, Technical leadership, Functional coverage, Code coverage
Industry
Semiconductor Manufacturing