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Senior Design Verification Engineer at onsemi

Bangalore, karnataka, India -

Full Time

Start Date

Immediate

Expiry Date

23 Jul, 26

Salary

0.0

Posted On

24 Apr, 26

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Digital IC Verification, SystemVerilog, UVM, RTL Debugging, Signal Processing, Python, Tcl, Embedded Software, Verification Strategy, Verification Planning, Mixed-signal IP, DAC, ADC, PLL, Wireless Interface, Project Leadership

Industry

Semiconductor Manufacturing

Description

Job Description The Role We are looking to expand our team with a Senior Digital IC Verification Engineer. You will help us develop IP for next generation Automotive, Industrial & Medical products. The successful candidate will participate in the design of complex mix-signal IPs and have familiarity with analog blocks such as DACs, ADCs, PLL and wireless interface etc. Responsibilities What You’ll Do * Define the verification strategy and the detailed verification plans for blocks and systems * Coordinate/lead the verification activities in the project teams * Develop SystemVerilog/UVM environments for blocks and top-level SoCs * Debug functional errors in RTL * Participate to verification methodology improvement activities #LI-RT1 onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world. More details about our company benefits can be found here: https://www.onsemi.com/careers/career-benefits [https://www.onsemi.com/careers/career-benefits] We are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.

Responsibilities

The successful candidate will define verification strategies and detailed plans for complex mixed-signal IP blocks and systems. They will also lead verification activities, develop UVM environments, and debug functional errors in RTL.