Senior Development Engineer – Photonic Devices / VCSEL Epitaxy (m/f/d) at Western Digital

Ulm, Baden-Württemberg, Germany -

Full Time

Start Date

Immediate

Expiry Date

28 Sep, 26

Salary

0.0

Posted On

30 Jun, 26

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

VCSEL Epitaxy, Semiconductor Physics, Photonic Device Design, Numerical Simulation, Epitaxial Layer Stacks, Optical Cavity Simulation, Carrier Transport Analysis, Thermal Simulation, Device Characterization, DOE, Heterostructures, Quantum Wells, Data Analysis, Technical Documentation, Mentoring, R&D

Industry

Computer Hardware Manufacturing

Description

Company Description WD is building the infrastructure behind the AI-driven data economy. As AI scales, so does data. Every interaction, every model, every system generates data that must be stored, managed, and made accessible over time. That’s where we come in. We combine deep engineering expertise with global-scale manufacturing to deliver the storage systems that make AI possible, powering hyperscale data centers, cloud platforms, and enterprise infrastructure worldwide. This isn’t theoretical work. It’s real systems, at real scale, people solving some of the hardest challenges in technology today. We’re looking for people who want to build, solve, and operate at that level. Join us and let’s shape the future of data. Job Description The Senior Development Engineer will drive the design and optimization of epitaxial stacks for VCSEL and related photonic device structures. The role focuses on translating device‑level requirements into robust epitaxial designs, using advanced semiconductor physics and numerical simulations to guide development and optimize performance, yield, and reliability. This position is ideal for someone with a strong academic and/or R&D background in semiconductor physics and photonic devices who wants to work at the interface of epitaxy, device design, and product development. Key Responsibilities Design and simulate epitaxial layer stacks for VCSEL and other photonic device structures to meet optical, electrical, and thermal device requirements. Develop and refine device and epitaxy simulation models (e.g., optical cavity / mode simulations, carrier transport, thermal behavior) to support architecture decisions. Translate system and device requirements into epitaxial specifications (materials, layer sequences, thicknesses, doping profiles). Work closely with epitaxy, process, and device characterization teams to: Define experiments and DOEs. Interpret measurement and reliability data. Iterate designs based on feedback from wafer- and device‑level results. Contribute to device architecture and development strategies, including roadmaps for performance, reliability, and manufacturability improvements. Analyze and correlate simulation, epitaxial, and device performance data to identify root causes and optimization paths. Prepare and present technical reports, design reviews, and development status updates for internal stakeholders. Collaborate in a multi‑disciplinary, international R&D environment, coordinating with colleagues across different locations and time zones (with substantial overlap to EU working hours). Mentor junior engineers and students in topics such as semiconductor device physics, simulation methodology, and data analysis. Qualifications PhD in Materials Science, Physics, Electrical Engineering, or a closely related field. Extensive professional experience with a strong record of sustained impact and increasing responsibility in R&D or applied academic research, ideally including collaboration with industry partners or participation in translational initiatives. Solid track record in semiconductor devices, preferably in photonic devices such as lasers, LEDs, or VCSELs. Deep understanding of semiconductor physics, including: Heterostructures and quantum wells. Optical cavities and resonant structures. Carrier transport, recombination mechanisms, and thermal effects. Experience with device or epitaxial stack simulations, for example: Optical mode / cavity simulations. Electronic band structure and carrier confinement. Thermal / electro‑thermal simulations. Strong ability to interpret experimental data (e.g., I‑V, L‑I, spectral, far‑field, lifetime/reliability data) and connect results to physical mechanisms and design choices. Fluent English (spoken and written), with the ability to write clear technical documentation and present complex topics to a mixed audience. Ability and willingness to work at least partially in EU time zones to ensure effective collaboration with European teams. Additional Information Western Digital thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Western Digital is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at [email protected] to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying. #LI-JS1 WD thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. WD is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at [email protected] to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying. Notice To Candidates: Please be aware that WD and its subsidiaries will never request payment as a condition for applying for a position or receiving an offer of employment. Should you encounter any such requests, please report it immediately to WD Ethics Helpline or email [email protected]. Business Function: R&D Engineering Work Location: Germany-Ulm-LMS13 Office--LOC_WDT_DEU-LMS13 Office

Responsibilities

The role involves designing and optimizing epitaxial stacks for VCSEL and photonic devices using semiconductor physics and numerical simulations. The engineer will translate device requirements into specifications and collaborate with cross-functional teams to improve performance, yield, and reliability.