Senior DFT designer at NXP Semiconductors

Catania, Sicily, Italy -

Full Time

Start Date

Immediate

Expiry Date

03 Aug, 26

Salary

0.0

Posted On

05 May, 26

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

DFT Design, Scan Insertion, ATPG, MBIST, LBIST, JTAG, Verilog, SystemVerilog, VHDL, Static Timing Analysis, Low-power DFT, Silicon Debug, ATE Bring-up, RTL Coding, DFT Verification, Mixed-signal ICs

Industry

Semiconductor Manufacturing

Description

Job Summary We are seeking an experienced Senior DFT Designer to contribute to the development of cutting-edge mixed-signal and digital integrated circuits. This role involves responsibility for designing, implementing, and verifying DFT architectures for complex SoCs working closely with RTL, physical design, verification, product and test teams to ensure robust testability and high-quality silicon. Job Responsibilities Lead and execute the full DFT design flow, including specification definition, architectural design, RTL coding (Verilog/SystemVerilog), synthesis, static timing analysis (STA), verification. Develop and integrate scan insertion, test compression, and ATPG patterns. Implement memory BIST strategies. Collaborate closely with digital, analog, mixed-signal, product, test and software teams. Collaborate with RTL and physical design teams for DFT insertion and timing closure. Develop and implement innovative DFT architectures and design methodologies to meet challenging performance, power, area and quality targets. Optimize test coverage, pattern count and test time. Perform comprehensive DFT verification at RTL and gate level. Work with ATE teams for test program development and silicon bring-up. Participate in post-silicon validation and debug activities, identifying and resolving issues to ensure product quality. Mentor junior engineers, provide technical guidance, and contribute to continuous improvement of DFT design processes and methodologies. Generate detailed design documentation, including specifications, test plans, and design reviews. Stay abreast of industry trends, emerging technologies, and best practices in digital IC design. Requirements Bachelor or master degree in microelectronics, electronic engineering or related Strong expertise in DFT methodologies: Scan, MBIST, LBIST, JTAG. Hands-on experience with industry standard ATPG tools. Proficiency in UPF/CPF-based low-power DFT. Knowledge of fault models (stuck-at, transition, path delay). Familiarity with physical design constraints for DFT. Experience in silicon debug and ATE bring-up Knowledge of Verilog, SystemVerilog, VHDL Strong commitment to schedule and work quality, good team player Good English capabilities More information about NXP in Italy... #LI-6710 NXP Semiconductors N.V. (NASDAQ: NXPI) enables a smarter, safer, and more sustainable world through innovation. As the world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets. For more information, visit www.nxp.com Bright Minds. Bright Futures. We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP, we offer online and offline learning opportunities to help you develop some of your core and professional skills. Commitment At NXP. We recognize NXP is a powerful change agent as we continue to deliver innovative solutions that advance a more sustainable future. We remain steadfast in our commitment to sustainability and making measurable year-on-year progress. Also, we aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind. We have programs in place focused on diversity, inclusion and equality. Thank you for considering a career at NXP. To help you prepare for the different steps in our hiring process, see the following useful advice and tips. Are you already an NXP employee? Do not apply here. Instead, you must apply via our internal career page. Thank you for your interest in supporting our recruitment efforts. Please note that NXP operates under a strict Preferred Supplier List (PSL) for all recruitment activities. Any candidate profiles or resume submitted without a prior written agreement or explicit request from our Talent Acquisition team will be considered unsolicited. Such submissions will be deemed free of any obligations, and no fees will be paid by NXP or any of its affiliates, subsidiaries, or divisions - regardless of whether the candidate is hired, either coincidentally or otherwise. Thank you for your understanding.

Responsibilities

Lead the full DFT design flow, including architectural design, RTL coding, and verification for complex SoCs. Collaborate with cross-functional teams to optimize test coverage and ensure high-quality silicon through post-silicon validation.