Senior DFT Engineer, ATPG at NVIDIA

Be’er-Sheva, South District, Israel -

Full Time

Start Date

Immediate

Expiry Date

02 May, 26

Salary

0.0

Posted On

01 Feb, 26

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

DFT, ATPG, ASIC Design, Pattern Generation, Verification, Post Silicon Validation, Automation Flows, Scripting Languages, Scan, MBIST, LBIST, Fault Models, Fault Simulation, Mentor TestKompress, TCL, Python, Unix Shell Scripts

Industry

Computer Hardware Manufacturing

Description

Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Design-for-Test Engineering team at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for a DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing. Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements! What you’ll be doing: You will be in charge of state of the art Design for Test/ATPG flows and implementation Take ATPG ownership on different DFT aspects of a project, Arch & planning, pattern generation, verification and post Silicon bring up and diagnosis. Inventing and maintaining automation flows that provide the short test time to production What we need to see: B.Sc. in Electrical Engineering or Computer engineering or equivalent experience 5+ years of hands on DFT/ATPG knowledge & technical experience in DFT ASIC Design and in ATPG tools Strong programming skills in scripting languages Quick learner, proactive and self-motivated, eager to learn and contribute, sense or ownership, commitment, and responsibility Ways to stand out from the crowd: Knowledge of DFT including scan, MBIST, LBIST, on-chip scan compression, fault models, ATPG, and fault simulation Experience in Mentor TestKompress ATPG tool and retargeting flow Programming languages: TCL, PRL, Phyton & Unix shell scripts Experience with ATE and Silicon bring-up NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and talented people in the world working for us. If you're creative and autonomous, we want to hear from you! You will have the opportunity to work on some of the most incredible products on the market today. NVIDIA is the world leader in accelerated computing. NVIDIA pioneered accelerated computing to tackle challenges no one else can solve. Our work in AI and digital twins is transforming the world's largest industries and profoundly impacting society. Learn more about NVIDIA.

Responsibilities

You will be in charge of state of the art Design for Test/ATPG flows and implementation. This includes taking ATPG ownership on different DFT aspects of a project, such as architecture and planning, pattern generation, verification, and post-silicon bring-up and diagnosis.