Senior Digital Design Engineer at NXP Semiconductors

Catania, Sicily, Italy -

Full Time

Start Date

Immediate

Expiry Date

05 Aug, 26

Salary

0.0

Posted On

07 May, 26

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Digital IC Design, Verilog, SystemVerilog, RTL Coding, Synthesis, Static Timing Analysis, Formal Verification, Power Analysis, DFT, Python, Perl, Tcl, Mixed-Signal Integration, SOC Architecture, Hardware Emulation, Post-Silicon Validation

Industry

Semiconductor Manufacturing

Description

NXP’s Industrial & IoT Edge solutions range from the smallest MCUs to very high-performance processors to provide real-time insights and efficient automation when performance matters most. NXP’s advanced portfolio of edge processing solutions lets developers explore their most innovative ideas with confidence, enabling applications across the autonomous home, industrial automation, and personal electronics. NXP is building new teams in Catania to create high impact micro-controllers (MCU) as part of NXP’s intelligent AI at the Edge. This team will include a wide range of engineering talent from analog to SOC digital design. Full product development local will product world class products at a world class pace. This team will include all key engineering disciplines in Analog and Digital Design, Architecture definition, Verification, DfT and Physical Design to produce high performance and quality products. Working in a fast-paced consumer environment, we are looking for an outstanding lead for our Analog Layout team. This team will include support for MCU and for analog custom products being designed both in Catania but also globally. Your Responsibilities. Lead and execute the full digital IC design flow for complex System-on-Chip (SOC), including specification definition, architectural design, RTL coding (Verilog/SystemVerilog), synthesis, static timing analysis (STA), formal verification, and power analysis. Contribute to design for testability (DFT) implementation and verification. Collaborate closely with analog, mixed-signal, and software teams to define interfaces, optimize system performance and ensure seamless integration. Develop and implement innovative digital architectures and design methodologies to meet challenging performance, power, and area targets. Perform comprehensive design verification using simulation tools, formal verification techniques, and hardware emulation. Participate in post-silicon validation and debug activities, identifying and resolving issues to ensure product quality. Mentor junior engineers, provide technical guidance, and contribute to continuous improvement of design processes and methodologies. Generate detailed design documentation, including specifications, test plans, and design reviews. Stay abreast of industry trends, emerging technologies, and best practices in digital IC design methodology shared in the team. Your Profile. Bachelor’s or Master's degree in Electrical Engineering, Electronics Engineering, or related field. Minimum of 5+ years of experience in digital IC design. Expertise in Verilog/SystemVerilog for RTL design and verification. Proven experience with industry-standard EDA tools for synthesis, STA (e.g., Synopsys Design Compiler, Cadence Genus, Primetime), formal verification (e.g., Synopsys Formality), and simulation (e.g., VCS, QuestaSim). Strong understanding of digital design principles, clock domain crossing (CDC) issues, power integrity, and low-power design techniques. Experience with scripting languages (e.g., Python, Perl, Tcl) for automation and design flow optimization. Familiarity with mixed-signal integration challenges and verification methodologies. Excellent problem-solving, analytical, and debugging skills. Strong communication and interpersonal skills, with the ability to work effectively in a collaborative team environment. Ability to take initiative, work independently, and lead technical discussions. More information about NXP in Italy... #LI-8e4d NXP Semiconductors N.V. (NASDAQ: NXPI) enables a smarter, safer, and more sustainable world through innovation. As the world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets. For more information, visit www.nxp.com Bright Minds. Bright Futures. We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP, we offer online and offline learning opportunities to help you develop some of your core and professional skills. Commitment At NXP. We recognize NXP is a powerful change agent as we continue to deliver innovative solutions that advance a more sustainable future. We remain steadfast in our commitment to sustainability and making measurable year-on-year progress. Also, we aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind. We have programs in place focused on diversity, inclusion and equality. Thank you for considering a career at NXP. To help you prepare for the different steps in our hiring process, see the following useful advice and tips. Are you already an NXP employee? Do not apply here. Instead, you must apply via our internal career page. Thank you for your interest in supporting our recruitment efforts. Please note that NXP operates under a strict Preferred Supplier List (PSL) for all recruitment activities. Any candidate profiles or resume submitted without a prior written agreement or explicit request from our Talent Acquisition team will be considered unsolicited. Such submissions will be deemed free of any obligations, and no fees will be paid by NXP or any of its affiliates, subsidiaries, or divisions - regardless of whether the candidate is hired, either coincidentally or otherwise. Thank you for your understanding.

Responsibilities

Lead the full digital IC design flow for complex System-on-Chip (SOC), from specification and RTL coding to synthesis and power analysis. Collaborate with cross-functional teams to optimize system performance and mentor junior engineers in design methodologies.