Do you want to join a team delivering world-class low power audio chipsets that change people’s lives?
At GN you will join a dedicated team with expertise in every area of chipset design for hearing applications that change people’s lives. Our chipset is at the heart of our hearing devices, which improve life quality for people of all ages, through improved hearing.
Welcome to GN’s IC team
As part of the platform group, we work closely together with system architects, SW- and HW teams to deliver a solid platform for building GN’s world class hearing aids of the future.
You will join 30+ specialist development engineers of all seniorities. We combine our expertise to make life sound better through innovative low power chipsets.
We work together to continuously inspire each other to bring forward the best results and we will encourage you to use your experience to assist us improve the way we work. Becoming a member of this diverse team of specialists, you get to bring your expertise and experience in digital design into play and develop your skills in multiple areas of IC verification.
We know sound
At GN, we are known for great sound quality, design and technology as well as meaningful solutions that support people with hearing problems rediscover hearing.
With location at GN’s HQ in Ballerup, Denmark, with the possibility to remotely 2 days per week, you will report to Digital IC Group Manager Michael da Costa Carneiro.
Verification of the GN Hearing chipsets
As Digital Verification IC Engineer, you get the chance to verify the best-in-class DSP/processors and low power wireless ICs. You will work with the entire pre-silicon digital verification flow, from early drafts test specifications to fully verified design.

Your primary tasks will be:

• Identify and implement verification plans for digital designs
• Development of UVM test components, test benches & test cases
• Debug constraint random verification test suites
• Implementation of System Verilog functional coverage and assertions
• Implementing and maintaining the pre-silicon Verification Flow
• Knowledge sharing in peer reviews
• Continuous documentation of pre-silicon verification flow and test cases

Here is what we imagine that you’ll need to succeed and create results

It is desirable if you have previous experience within the following areas, depending on your seniority.

• A degree in electronics/IC and 3+ years of experience from a similar role in formal verification.
• Experience with matrix based functional verification from specification to coverage closure
• Solid understanding of the UVM framework and SystemVerilog
• Experience in functional- and code coverage for digital verification sign-off
• Knowledge of HDL simulators and viewers like VCS, Verdi or Incisive
• A great passion for quality, understanding the importance of pre-silicon verification
• Python, SystemC, TCL, Makefiles and shell scripting
• Embedded programming using C/C++ or ASM
• Can work 2-3 days from our HQ in Ballerup

At GN we value your open personality and your good interpersonal and communicational skills. Your enthusiasm for working together and valuing input from others is matched by your self-motivation and commitment to collective achievements.
Would you like to know more?
For further information about the position, please contact Digital IC Group Manager Michael da Costa Carneiro on mcarneiro@gnhearing.com
Think you’ve got what it takes? Apply now
To apply, use the ‘APPLY’ link. We do encourage you to send your application already now.
Quick apply
You are welcome to use our Quick Apply functionality, where you only submit your CV. We only ask that your CV is up-to-date – quick, and easy.
We hope you will join us on this journey and good luck with your application.

LI-GNGrou

• Identify and implement verification plans for digital designs
• Development of UVM test components, test benches & test cases
• Debug constraint random verification test suites
• Implementation of System Verilog functional coverage and assertions
• Implementing and maintaining the pre-silicon Verification Flow
• Knowledge sharing in peer reviews
• Continuous documentation of pre-silicon verification flow and test case