ABOUT CELESTIAL AI

As Generative AI continues to advance, the performance drivers for data center infrastructure are shifting from systems-on-chip (SOCs) to systems of chips. In the era of Accelerated Computing, data center bottlenecks are no longer limited to compute performance, but rather the system’s interconnect bandwidth, memory bandwidth, and memory capacity. Celestial AI’s Photonic Fabric™ is the next-generation interconnect technology that delivers a tenfold increase in performance and energy efficiency compared to competing solutions.
The Photonic Fabric™ is available to our customers in multiple technology offerings, including optical interface chiplets, optical interposers, and Optical Multi-chip Interconnect Bridges (OMIB). This allows customers to easily incorporate high bandwidth, low power, and low latency optical interfaces into their AI accelerators and GPUs. The technology is fully compatible with both protocol and physical layers, including standard 2.5D packaging processes. This seamless integration enables XPUs to utilize optical interconnects for both compute-to-compute and compute-to-memory fabrics, achieving bandwidths in the tens of terabits per second with nanosecond latencies.
This innovation empowers hyperscalers to enhance the efficiency and cost-effectiveness of AI processing by optimizing the XPUs required for training and inference, while significantly reducing the TCO2 impact. To bolster customer collaborations, Celestial AI is developing a Photonic Fabric ecosystem consisting of tier-1 partnerships that include custom silicon/ASIC design, system integrators, HBM memory, assembly, and packaging suppliers.

QUALIFICATIONS

• BS/MS in Electrical Engineering, Computer Engineering, Physics, or related field.
• 10+ years of experience in systems engineering, applications engineering, or hardware development with a focus on high-speed interconnects.
• Solid understanding of copper and optical SerDes.
• Good understanding of Co-Packaged Optics, CPO chiplets, transceivers, modulators, lasers, and advanced packaging.
• Working knowledge of memory systems (DDR, HBM, CXL.mem) and PCIe/CXL protocols.
• Familiarity with AI system architectures and Scale-Up networks, including GPU/TPU/NPU/XPU-based compute nodes, and TCO of AI workloads.
• Strong problem-solving skills, hands-on lab experience is desired
• Excellent communication skills and customer-facing experience.

PREFERRED QUALIFICATIONS

• Prior experience with silicon photonics, or advanced packaging technologies.
• Knowledge of AI workload characteristics and infrastructure performance bottlenecks.
  LOCATION: Santa Clara, CA
  For California Location:
  As an early stage start up, we offer an extremely attractive total compensation package inclusive of competitive base salary, bonus and a generous grant of our valuable early-stage equity. The target base salary for this role is approximately $225,000.00 - $275,000.00. The base salary offered may be slightly higher or lower than the target base salary, based on the final scope as determined by the depth of the experience and skills demonstrated by candidate in the interviews.
  We offer great benefits (health, vision, dental and life insurance), collaborative and continuous learning work environment, where you will get a chance to work with smart and dedicated people engaged in developing the next generation architecture for high performance computing.
  Celestial AI Inc. is proud to be an equal opportunity workplace and is an affirmative action employer.
  

  LI-Onsit

ABOUT THE ROLE

We are seeking a highly motivated and technically skilled Applications Engineer to support the technical customer engagements in evaluation and deployment of photonics interconnects for AI infrastructure (Scale-Up Networks and Memory systems. This role bridges cutting-edge photonics hardware with next-generation AI system architectures, enabling high-bandwidth, low-latency interconnect solutions for ML and AI data-intensive workloads.
You will work closely with customers, design teams, and system architects to evaluate system-level requirements and ensure the successful deployment of the Photonic Fabric™ interconnect and rack-level scale-up systems. Your role will also involve creating reference designs, debugging complex system-level issues, and contributing to product definition and roadmap development.

ESSENTIAL DUTIES AND RESPONSIBILITIES

• Provide application support for photonic interconnect products targeting AI and HPC platforms.
• Lead customer-facing pre and post-sales technical engagements with customers’ networking and memory system architects, and XPU SOC engineering.
• Lead technical discussions for system-level and chip-level integration of interconnect technologies, including copper and optical SerDes.
• Analyze performance trade-offs and help optimize configurations across multiple hardware domains (Electrical and Optical) and protocols (PFLink, UAL, PCIe, CXL, etc.).
• Collaboratively debug and resolve customer issues related to interconnects.
• Drive & develop reference designs, application notes, and customer-facing technical collateral.
• Interface with internal R&D teams to relay customer feedback and influence future product features and specifications.
• Conduct technical training, workshops, and proof-of-concept demonstrations for customers and partners.
• Stay current on industry trends in AI infrastructure interconnects & Scale-Up networking.