Senior DV Engineer at Capgemini Portugal

Santa Clara, California, United States -

Full Time

Start Date

Immediate

Expiry Date

12 Feb, 26

Salary

0.0

Posted On

14 Nov, 25

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Design Verification, Functional Verification, UVM, SystemVerilog, C/C++, DPI, Test Plans, Constrained Random Testing, Coverage Analysis, Object-Oriented Programming, EDA Tools, Python, Shell Scripting, Ethernet, Mixed Signal Digital Design, Formal Property Verification

Industry

IT Services and IT Consulting

Description

About the Job You’re Considering We’re seeking a Design Verification Engineer for a hybrid role based in Santa Clara, CA or Boston, MA. This position focuses on Functional Verification and offers an opportunity to work on cutting-edge SoC designs in a collaborative environment. Your Role Architect and develop a complete functional verification environment, including testbench, reference models, and monitors/drivers. Define comprehensive verification test plans using constrained random, directed testing, and coverage analysis. Implement testbenches using UVM, SystemVerilog, C/C++, and DPI. Verify designs across multiple hierarchy levels: block/unit, subsystem, and SoC. Collaborate closely with logic designers to debug failures and resolve design issues. Your Skills and Experience Education/Experience: BS/MS degree with 5–12 years of relevant professional experience. Methodology: Expertise in UVM and SystemVerilog for SoC verification, including creating test plans and designing hierarchical, reusable, and scalable testbench architectures. Programming: Strong background in Object-Oriented Programming (OOP) with SystemVerilog and constrained random techniques. Tools: Hands-on experience with EDA verification/debugging tools and revision control systems. Scripting: Proficiency in Python or Shell scripting. Technical Domains: Experience in one or more areas—Ethernet, Mixed Signal Digital design verification, Formal Property Verification (Jasper or similar tools), or ARM-based SoC verification. Life at Capgemini Capgemini supports all aspects of your well-being throughout the changing stages of your life and career. For eligible employees, we offer: Flexible work Healthcare including dental, vision, mental health, and well-being programs Financial well-being programs such as 401(k) and Employee Share Ownership Plan Paid time off and paid holidays Paid parental leave Family building benefits like adoption assistance, surrogacy, and cryopreservation Social well-being benefits like subsidized back-up child/elder care and tutoring Mentoring, coaching and learning programs Employee Resource Groups Disaster Relief About Capgemini Engineering World leader in engineering and R&D services, Capgemini Engineering combines its broad industry knowledge and cutting-edge technologies in digital and software to support the convergence of the physical and digital worlds. Coupled with the capabilities of the rest of the Group, it helps clients to accelerate their journey towards Intelligent Industry. Capgemini Engineering has 65,000 engineer and scientist team members in over 30 countries across sectors including Aeronautics, Space, Defense, Naval, Automotive, Rail, Infrastructure & Transportation, Energy, Utilities & Chemicals, Life Sciences, Communications, Semiconductor & Electronics, Industrial & Consumer, Software & Internet. Capgemini Engineering is an integral part of the Capgemini Group, a global business and technology transformation partner, helping organizations to accelerate their dual transition to a digital and sustainable world, while creating tangible impact for enterprises and society. It is a responsible and diverse group of 340,000 team members in more than 50 countries. With its strong over 55-year heritage, Capgemini is trusted by its clients to unlock the value of technology to address the entire breadth of their business needs. It delivers end-to-end services and solutions leveraging strengths from strategy and design to engineering, all fueled by its market leading capabilities in AI, generative AI, cloud and data, combined with its deep industry expertise and partner ecosystem. The Group reported 2024 global revenues of €22.1 billion. Get the future you want | www.capgemini.com Disclaimer Capgemini is an Equal Opportunity Employer encouraging inclusion in the workplace. All qualified applicants will receive consideration for employment without regard to race, national origin, gender identity/expression, age, religion, disability, sexual orientation, genetics, veteran status, marital status or any other characteristic protected by law. This is a general description of the Duties, Responsibilities and Qualifications required for this position. Physical, mental, sensory or environmental demands may be referenced in an attempt to communicate the manner in which this position traditionally is performed. Whenever necessary to provide individuals with disabilities an equal employment opportunity, Capgemini will consider reasonable accommodations that might involve varying job requirements and/or changing the way this job is performed, provided that such accommodations do not pose an undue hardship. Capgemini is committed to providing reasonable accommodations during our recruitment process. If you need assistance or accommodation, please reach out to your recruiting contact. Please be aware that Capgemini may capture your image (video or screenshot) during the interview process and that image may be used for verification, including during the hiring and onboarding process. Click the following link for more information on your rights as an Applicant http://www.capgemini.com/resources/equal-employment-opportunity-is-the-law Applicants for employment in the US must have valid work authorization that does not now and/or will not in the future require sponsorship of a visa for employment authorization in the US by Capgemini.

Responsibilities

The role involves architecting and developing a complete functional verification environment, including testbench and reference models. You will also define comprehensive verification test plans and collaborate closely with logic designers to debug failures.