Senior Engineer, ASIC Development Engineering(ASIC Verification) at Sandisk

Bengaluru, karnataka, India -

Full Time

Start Date

Immediate

Expiry Date

27 Sep, 26

Salary

0.0

Posted On

29 Jun, 26

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

C, SystemVerilog, UVM, Coverage Driven Verification, DFX Verification, Gate-Level Simulation, PCIe, LPDDR, AXI, AHB, APB, Python, Perl, TCL, BASH, FPGA Prototyping

Industry

Semiconductor Manufacturing

Description

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Job Description SoC Verification Engineer The SoC Development team at Sandisk is seeking highly motivated SoC Verification Engineers to join our talented team, working on cutting-edge controller development for high-performance SoCs used in industry-leading products. Role & Responsibilities: As a SoC Verification Engineer, you will play a key role in ensuring the quality and reliability of our SoC designs. You will be responsible for: Developing verification test plans based on design specifications. Creating and executing test cases across multiple platforms, including RTL simulation, FPGA prototyping, and Palladium emulation. Verification test structures (DFx Verification) Performing Gate-Level Simulations (GLS) and debugging complex SoC designs. Collaborating with design, architecture, and firmware teams to define verification strategies and drive coverage-driven verification methodologies. Contributing to the development of advanced verification environments, including UVM, PSS testbenches. Analyzing functional coverage and simulation results to enhance verification efficiency and effectiveness. Genrating Fucntional patterns required for Wafer Sorting. Why Join Us? At Sandisk, you’ll be part of a team of highly skilled engineers solving complex verification challenges and driving innovations in data storage solutions. Your work will directly impact the performance and reliability of high-volume new age data solutions, consumer and enterprise products. Together, we’ll push the boundaries of technology, unlock the full potential of data, and shape the future of storage solutions. Qualifications Required: BE or MS degree in Electrical/Electronics Engineering or Computer Engineering, with 4-8 years of experience Deep understanding of C, SystemVerilog UVM and coverage driven verification methodology Working experience in Verifying Processor based SoC's (ARM, RISC-V, ARC) Experience in DFX Verification Experience to generate functional patterns used for Post-Silicon testing. History of building and improving UVM based verification methodology Skills: Develop and execute verification plans Proficiency with C, Verilog, System Verilog and UVM based verification Knowledge in various interfaces – PCIe or LPDDR, UART, I2C, I2S, SPI Experience working on processor-based SoC -- ARC/ARM/RISC.. Experience in implementing advanced test benches, verification models, scoreboards/checkers. Knowledge in bus protocols - AXI, AHB, APB and bus interconnects Experience with test plan creation and test-bench development Experience with test development and test coverage assessment Excellent debugging and problem-solving skill Create and modify SoC-level, and sub-system level test benches. Experience in setting up and running gate-level simulations Gate Level / Power-Aware simulations Great written and verbal communication skills Good Programming/Scripting skills with languages such as Python, Perl, TCL, and BASH Interest in ASICs, SoCs, flash memory, semiconductor components Strong team player who can collaborate with colleagues Additional Information All your information will be kept confidential according to EEO guidelines. Job Type (exemption status): Exempt position - Please see related compensation & benefits details below Business Function: ASIC Development Engineering Work Location: Bangalore PTP Office (IBP)--LOC_WDT_IBP

Responsibilities

Develop verification test plans and execute test cases across RTL simulation, FPGA prototyping, and Palladium emulation. Collaborate with cross-functional teams to drive coverage-driven verification methodologies and develop advanced UVM testbenches.