Senior Engineer - ASIC Development Engineering (DFT) at Sandisk

Bengaluru, karnataka, India -

Full Time

Start Date

Immediate

Expiry Date

14 Jul, 26

Salary

0.0

Posted On

15 Apr, 26

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

DFT Architecture, MBIST, SCAN, ATPG, Simulation, ASIC DFT Implementation, Hardware Description Languages, JTAG, BSDL, Test clocking, Test mode timing closure, Silicon debug, Analytical skills, Problem-solving, Communication skills

Industry

Semiconductor Manufacturing

Description

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Job Description We are seeking a skilled DFT Engineer to join our dynamic team responsible for DFT of next-generation Flash Controllers. As an SoC DFT Engineer, you will be responsible for implementing DFT structures and create structural test content. The ideal candidate should understand DFT Architecture, Implementation flow, MBIST, SCAN ATPG & Simulation expertise. ESSENTIAL DUTIES AND RESPONSIBILITIES: Executing different DFT tasks and providing solutions for DFT problems. Working closely with the internal DFT team and ensure timelines and quality of deliveries are met. Work closely with the Product Engineering team and understand the test requirements, get involved in simple silicon debugs. Continuously monitor the enhancement needs on internal DFT and ensure all flow requirements are implemented by CAD. Qualifications B.Tech / M,Tech / Phd in Electronics, Computer science or Electrical Engineering Minimum 3 years of experience in DFT Understanding of DFT Architecture SKILLS: Work on different DFT tasks with the team and be a team player. Capable of delivering results on execution with focus on quality of delivery. Understanding of ASIC DFT Implementation tools, simulation methodologies, and hardware description languages (HDLs). Proficiency in SCAN, MBIST implementation. Understanding of JTAG & BSDL standards. Understanding on Test clocking requirements, Test mode timing closure. Capable of setting up MBIST, ATPG and Simulation environments and debug issues. Good analytical and problem-solving skills. Strong communication skills and the ability to work effectively with the team. Additional Information Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at[email protected] to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying. Job Type (exemption status): Exempt position - Please see related compensation & benefits details below Business Function: ASIC Development Engineering Work Location: Bangalore PTP Office (IBP)--LOC_WDT_IBP

Responsibilities

You will be responsible for implementing DFT structures and creating structural test content for next-generation Flash Controllers. The role involves working closely with the internal DFT and Product Engineering teams to ensure delivery quality and resolve silicon debug issues.