Start Date
Immediate
Expiry Date
15 Feb, 26
Salary
0.0
Posted On
17 Nov, 25
Experience
2 year(s) or above
Remote Job
Yes
Telecommute
Yes
Sponsor Visa
No
Skills
AISC Verification, System Verilog, UVM, Verilog, IP Level Verification, Testbench Architecture Development, Testbench Component Developments, Coverage Closer, Code Coverage, Functional Coverage, Gate Level Simulations, Verification Plan Definition, Testbenches Creation, Scripting Languages, Continuous Process Improvement
Industry
Semiconductor Manufacturing