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Senior Engineer Design-RTL at Infineon Technologies AG Australia
Bengaluru, karnataka, India -
Full Time

Start Date

Immediate

Expiry Date

12 Feb, 26

Salary

0.0

Posted On

14 Nov, 25

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

RTL Design, Integration, Digital Design, VLSI, System Verilog, VHDL, Scripting, Team Player, Communication Skills, Analytical Skills, Problem-Solving Skills, ARM Architecture, Power Topology, Clock Structure, Reset Strategy, Silicon Debug

Industry

Semiconductor Manufacturing

Description
RTL Design/Integration for IoT SoCs Work with digital/analog/RF IP teams to arrive IP configuration at SoC level Drive power topology at SoC level, clock structure and reset strategy Identify low power opportunities at SoC level Define power intent of SoC Arrive IO requirements/muxing Integration of sub-systems/IPs while considering sub-system/IP features/configurations/generics, power/clock/reset, standard/proprietary interface requirements Drive analysis of CDC, lint, low power reports. Deliver synthesis constraints at SoC level Participate, as applicable, silicon debug activities. Help, drive improvements on-the-fly (as project executes) Ensure an inclusive teamwork environment, inspire team members, and role model. Work effectively with several stakeholder teams globally. B Tech or M Tech with experience of Digital design / VLSI Knowledge of System Verilog/VHDL languages Knowledge with scripting Team player with good communication skills. Strong analytical and problem-solving skills Familiarity with ARM based SOC architecture is a plus. We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills.

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Responsibilities
The role involves RTL design and integration for IoT SoCs, working with various IP teams to configure the SoC level. Responsibilities include driving power topology, analyzing reports, and participating in silicon debug activities.