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SENIOR ENGINEER - HBM VERIFICATION at Micron Technology
Tlaquepaque, jalisco, Mexico -
Full Time

Start Date

Immediate

Expiry Date

06 Feb, 26

Salary

0.0

Posted On

08 Nov, 25

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

Pre-Silicon Verification, Simulation, Debugging, Test Cases, Functional Coverage, Verification Methodology, Verification Environments, UVM, DFT Features, Timing Analysis, Test Benches, Test Vectors, Regression, Memory Design, Cross Functional Tasks, Collaboration

Industry

Semiconductor Manufacturing

Description
Collaborate closely with design and verification team members spread across the globe, many of whom have decades of experience in memory design. Work on cross functional tasks that can widen your skill set. Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes. Provide verification support to design projects by simulating, analyzing and debugging pre-silicon full chip designs. Develop Test cases/Stimulus to increase the functional coverage for HBM emerging memory architectures and features. Participate in developing verification methodology and verification environments for advanced HBM and emerging memory products. Co-work with international colleagues on developing new verification flows to take on the challenges in HBM and emerging memory design. Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements. 5+ years of experience in pre-silicon verification BE or MTech in Electronics Engineering, or related. Proficiency in establishing and simulating verification environments Proficient understanding of basic digital circuits, simulation, troubleshooting, and evaluation. Proven ability to guide and direct verification efforts within areas of expertise. Experience developing test cases/stimuli to increase functional coverage Experience with high-level understanding of UVM. Knowledge of DFT features, including custom DFT and standard scan chains. Exposure to critical timing, data path timing analysis. Experience with complete ownership of verification and end-to-end analysis of complex full chip custom builds with outstanding power, performance, and bandwidth.
Responsibilities
Collaborate with design and verification teams globally to guide verification efforts in HBM projects. Develop test cases and verification methodologies for advanced memory products.