Senior FPGA Engineer at Apple

San Diego, California, United States -

Full Time

Start Date

Immediate

Expiry Date

28 Jan, 26

Salary

0.0

Posted On

30 Oct, 25

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

FPGA, SoC, System Verilog, High-level Synthesis, Python, Software-defined Radio, Real-time Data Processing, Data Analysis, Data Visualization, Kernel-space User-space Device Drivers, Linux, Xilinx, HLS, Yocto Linux, Petalinux, RF Digital Signal Processing

Industry

Computers and Electronics Manufacturing

Description

At Apple, we strive every single day to craft products that enrich people’s lives. Our successes are the result of skilled domain experts working in an environment which encourages creativity, collaboration, and re-thinking of old problems in new ways! As a member of the Satellite Connectivity Group, you will work on the satellite network that enables connectivity to iPhone when off the grid without cellular or Wi-Fi coverage. Every day, Apple customers use Emergency SOS via satellite to access emergency assistance when they are in need of help and have no other means to communicate. You will have the unique and rewarding opportunity to shape this and other critical services, to the benefit and safety of millions of Apple device users. Our team is looking for an experienced FPGA / SoC engineer with System Verilog, High-level Synthesis (HLS/C++), and Python skills and experienced in software-defined-radio and/or real-time data-processing systems. DESCRIPTION A successful candidate will be responsible for designing, implementing, testing, and operating a complex real-time software system that runs on a globally-distributed heterogeneous compute platform and processes every bit of information exchanged to realize the satellite connectivity. MINIMUM QUALIFICATIONS 10+ years of experience of designing and implementing high-bandwidth data-processing application on Xilinx FPGA / SoC platforms in System Verilog or HLS. 5+ years of experience of designing FPGA accelerators in HLS (Xilinx Vitis HLS). 5+ years of experience of workflow automation, data analysis, and data visualization in Python. Ability to design the CPU-FPGA interface based on the standard protocols (AXI-MM, AXI-Stream) and the standard Linux subsystems (contiguous memory allocation, user I/O, device tree). Ability to set up a Yocto Linux or Petalinux project for a custom Xilinx SoC board from scratch. Ability to write kernel-space user-space device drivers in C++ for high-bandwidth and real-time hardware accelerators / custom peripherals. Knowledge of and ability to mentor other team members on modern design/coding best practices. PREFERRED QUALIFICATIONS General radio-frequency (RF) digital signal processing knowledge. Hands-on development experience in areas related to 5G, WiFi, GNSS, CCSDS, and/or SpaceWire.

Responsibilities

The successful candidate will design, implement, test, and operate a complex real-time software system for satellite connectivity. This role involves processing information on a globally-distributed heterogeneous compute platform.