Senior FPGA Engineer at SEAKR Engineering

Greenwood Village, Colorado, United States -

Full Time

Start Date

Immediate

Expiry Date

18 Jun, 26

Salary

185000.0

Posted On

20 Mar, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

FPGA Design, Digital Circuit Design, State Machines, Verilog, VHDL, Test Bench Development, Simulation, TCL, Python, RTL Debug, CDC, Reset Design, Clock Design, Leadership, Logic Analyzers, Scopes

Industry

Space Research and Technology

Description

Company Description Join SEAKR Engineering, a leading-edge provider of advanced electronics for space applications. Pushing the boundaries of technology on a mission to change the world for the better from space. Job Description Seeking an FPGA Engineer who has extensive knowledge of digital circuit design, state machines, Boolean math and FPGAs. Candidate shall have experience with Completing multiple FPGA or ASIC design using Verilog and/or VHDL, including at least one of moderate complexity Demonstrate knowledge and development of a test bench with self-checking and simulation (including back annotated timing) for given FPGA modules, top level FPGA, and system with multiple FPGAs FPGA technology differences (Xilinx vs Actel/Microsemi) FPGA process and development flows, especially flows using Synplify Pro, ISE, Vivado and Libero Scripting languages such as TCL or Python Leading small sized teams in order to develop moderately complex systems according to program schedule expectations Required skills FPGA design experience including thorough design documentation, completion and review of RTL blocks, participation in code reviews, significant RTL debug, and working knowledge of CDC, reset and clock design Ability to solve digital lab debug problems with use of lab tools such as bench supplies, scopes and logic analyzers Knowledge of RTL design techniques for radiation upset mitigation and experience using multiple RTL languages are a plus. Qualifications Candidate shall also have leadership skills and ability to provide support and technical direction to junior engineers. Clear written and verbal communication skills are required. A Bachelor's degree in Electrical Engineering or Computer Science is desired. Must have at least 10+ years of FPGA experience. Additional Information Compensation: Base pay range is $130,000-185,000 depending on qualifications. SEAKR has very rich medical, dental and vision insurance plans, along with a generous 401(k) retirement plan. In addition to base salary, employees are eligible for a year-end bonus. SEAKR offers a variety of paid leave, such as vacation, sick, bereavement, and FMLA. SEAKR is an Equal Opportunity Employer - All your information will be kept confidential according to EEO guidelines. US Citizenship Required Applications will be accepted until 4/2/26 Compensation: USD 130000 - USD 185000 - yearly

Responsibilities

The role involves completing multiple FPGA or ASIC designs using Verilog and/or VHDL, including developing test benches with self-checking and simulation capabilities for various FPGA modules and systems. The engineer will also lead small teams to develop moderately complex systems according to program schedules.