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Senior GPU Top Design Engineer at Apple
London, England, United Kingdom -
Full Time

Start Date

Immediate

Expiry Date

10 May, 26

Salary

0.0

Posted On

09 Feb, 26

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

Logic Synthesis, SystemVerilog, VHDL, Problem-Solving, Computer Architecture, Physical Design, SoC Design, GPU Design, Scripting Languages

Industry

Computers and Electronics Manufacturing

Description
The Top Design team at the UK GPU Design Centre works on complex, large-scale GPU related projects. We partner with our graphics architecture, functional verification and physical design teams to deliver high quality graphics IP in order to meet performance, feature, timing, area and power goals. DESCRIPTION The GPU top design team develops micro-architecture and RTL for critical top-level infrastructure IP, and drives micro-architectural improvements across the entire GPU through our holistic system-level perspective. We own complete IP blocks including interconnects, control logic, and clocking/reset distribution. Our unique position working across the full GPU scope enables us to identify optimization opportunities that span multiple units which means our micro-architecture work can influence outside of IP that we own when we identify better system-level solutions. We handle the complete design flow for our IP from concept through physical design handoff, while also contributing to GPU-level assembly and integration. MINIMUM QUALIFICATIONS Expertise in design including logic synthesis Expertise in SystemVerilog/VHDL and proficiency in revision control systems Strong problem-solving skills, ability to work across team boundaries and be productive under aggressive schedules PREFERRED QUALIFICATIONS Understanding of computer architecture and physical design Experience with large-scale SoC or GPU design Experience of scripting languages (for example Python/Ruby/Tcl)
Responsibilities
The GPU top design team develops micro-architecture and RTL for critical top-level infrastructure IP. They handle the complete design flow for their IP from concept through physical design handoff.