Senior Hardware Design Engineer, Ethernet Switching at Arista Networks

Roseville, California, United States -

Full Time

Start Date

Immediate

Expiry Date

06 Oct, 26

Salary

470000.0

Posted On

08 Jul, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Hardware Design, Ethernet Switching, PCB Layout, Signal Integrity, Schematic Capture, Component Selection, System Debugging, DFM, FPGA Design, Verilog, Power Integrity, High-speed Interfaces

Industry

Computer Networking Products

Description

Company Description Arista Networks is an industry leader in data-driven, client-to-cloud networking for large data center, campus and routing environments. What sets us apart is our relentless pursuit of innovation. We leverage the latest advancements in cloud computing, artificial intelligence, and software-defined networking to provide our clients with a competitive edge in an increasingly interconnected world. Our solutions are designed to not only meet the current demands of the digital landscape but to also anticipate and adapt to future challenges. At Arista we value the diversity of thought and perspectives that each employee brings to the table. We believe that fostering an inclusive environment, where individuals from various backgrounds and experiences feel welcome, is essential for driving creativity and innovation. Our commitment to excellence has earned us several prestigious awards, such as Best Engineering Team, Best Company for Diversity, Compensation, and Work-Life Balance. At Arista, we take pride in our track record of success and strive to maintain the highest standards of quality and performance in everything we do. We are growing in Roseville! Be among the founding engineers shaping Arista’s new Roseville R&D Lab where you’ll help design next-generation networking technology alongside some of the industry’s brightest engineers. Job Description Who You’ll Work With Working closely with cross-functional teams including software, product management, and manufacturing, our engineers innovate on system architectures, high-speed PCB designs, and signal integrity to deliver state-of-the-art products that drive network performance and reliability. The total estimated annual compensation range for this position, inclusive of base salary, bonus, and equity, is $260,000 to $470,000. This range is a good faith estimate only. Bonus and equity are discretionary, subject to plan terms, and are not guaranteed components of total compensation. Actual total annual compensation may vary based on employee performance, company or equity performance, company policy, board approval, or similar factors. Please see additional base salary information below. What You'll Do Our Hardware Design Engineering team is at the forefront of developing high-speed networking and Ethernet products used in Enterprise campuses, hyper-scale data centers and bleeding edge AI clusters. The team is responsible for the end-to-end design and development of advanced hardware solutions that meet the demands of modern networking environments. Candidates for this position would be responsible for the entire hardware design process: Authoring Functional Specifications of high power and high density Ethernet switches used in AI networks Selecting and Qualifying Components Schematic Capture (both flat and hierarchical) Working closely with eCAD teams on PCB layout and component footprints Working with internal teams to run (or run your own) signal integrity simulations on both power and datapath signals Specifying PCB stackup and fabrication details with various PCB vendors Working closely with local and overseas Contract Manufacturers (CM), from proto through production Lab bring up and debug of prototypes Driving complex system debug between software, hardware, and test teams Training CM for high yield test and manufacturing Guiding groups of engineers and mentoring younger engineers Qualifications BSEE or MSEE 10+ years of relevant experience in hardware engineering Experience designing Networking Hardware, particularly involving 100G and 200G PAM4 Ethernet switching Embedded x86/ARM system design is highly desirable Experience designing 20+ layer count boards featuring 50G+ signals, and advanced PCB manufacturing technologies such as sequential lamination, HDI, and ultra-low-loss materials Experience working with multi-phase DC/DC’s for high current, high transient loads Experience working with High speed interfaces, such as DDR, PCIe Writing specifications and drawing schematics for high complexity boards Working closely with CAD designers on complicated layout and routing Working closely with Software and test engineers to bring-up and debug systems Familiarity with signal integrity and power integrity concepts and tools, such as: impedance, PDN’s, differential routing, insertion loss, S-parameters, TDR’s, VNA’s Experience with mass production Design for Manufacturability (DFM) FPGA design and system simulation using Verilog Working with Contract Manufacturers Successfully taking products from concept to production Base Salary Information: The new hire base pay for this role has a pay range of $162,000 to $225,000. Arista offers different pay ranges based on work location, so that we can offer consistent and competitive pay appropriate to the market. The actual base pay offered will be based on a wide range of factors, including skills, qualifications, relevant experience, and work location. The salary range provided reflects base pay only. As described above, this position may also be eligible for discretionary Arista bonuses and equity. US- based employees are also entitled to benefits including medical, dental, vision, wellbeing, tax savings and income protection. The recruiting team can share more details during the hiring process specific to the role and location. #LI-MU1 Additional Information Arista Networks is an equal opportunity employer. Arista makes all hiring and employment-related decisions in a non-discriminatory manner without regard to race, color, religion, sex, sexual orientation, gender identity, national origin or any other factor determined to be unlawful under applicable federal, state, or law law. All your information will be kept confidential according to EEO guidelines.

Responsibilities

Responsible for the end-to-end design and development of high-power, high-density Ethernet switches for AI networks. This includes authoring functional specifications, managing PCB layout, and driving system debug between software and hardware teams.