Senior Layout Designer at Micron Technology

San Jose, California, United States -

Full Time

Start Date

Immediate

Expiry Date

11 Jul, 26

Salary

120.0

Posted On

12 Apr, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Semiconductor layout design, Cadence Virtuoso, Synopsys, Calibre, Root-cause analysis, Floor-planning, Signal-planning, Power-planning, Physical verification, Debugging, Data integrity, Technical innovation, Project management, Automation development, Communication

Industry

Semiconductor Manufacturing

Description

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Senior Layout Designer, you will develop and prepare multi-dimensional layouts. You will provide detailed drawings of semiconductor devices from schematics and related geometry provided by design engineers, verify data integrity, and take the lead in major block developments. You’ll be expected to communicate effectively with other functional groups across global sites, e.g. TD, design, verification, and CAD. We’re seeking a self-starter who can learn rapidly and adapt quickly to changing priorities. Responsibilities: Organize and prioritize logistics and resource allocations to meet scheduled deadlines and proactively develop methodologies for issue resolution Contribute to group management and technical innovation Time management skills and prioritizing tasks and deliver quality-controlled results. Contribute to projects in a globally distributed design/layout environment Contribute to the improvement of layout efficiency through the development of automation and new methodologies; plan, and deliver major blocks and product revisions. Minimum qualifications: As or AAS in Electronics, Electrical Engineering, or a related field plus 10 years of direct experience in semiconductor layout design Deep working knowledge of EDA tools (i.e. Cadence Virtuoso, Synopsys, Calibre) Demonstrate a strong ability to debug problems through root-cause analysis, find effective and efficient solutions, and collaborate with the engineering staff Skilled in developing and applying custom layout, floor‑planning, signal-planning and power‑planning methodologies Strong verbal and written communication skills In-depth understanding of design rules and delivering quality layouts Strong physical verification analysis and debugging skills The US base salary range that Micron Technology estimates it could pay for this full-time position is: $56.25 - $120.00 an hour Additional compensation may include benefits, bonuses and equity. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position across all US locations. Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training. The pay scale is subject to change depending on business needs. Your recruiter can share more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits. Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws. To learn about your right to work click here. To learn more about Micron, please visit micron.com/careers US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron’s People Organization at hrsupport_na@micron.com or 1-800-336-8918 (select option #3) Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification. Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.

Responsibilities

The Senior Layout Designer will develop multi-dimensional semiconductor layouts and provide detailed drawings from schematics. They are responsible for leading major block developments, verifying data integrity, and collaborating with global functional groups.