Senior Lead SI Test Engineer at CELESTICA ELECTRONICS M SDN BHD

Shanghai, Shanghai, China -

Full Time

Start Date

Immediate

Expiry Date

08 Jan, 26

Salary

0.0

Posted On

10 Oct, 25

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Signal Integrity, Hardware Testing, Validation, Debugging, Failure Analysis, Teamwork, Communication, Problem Solving, Electrical Concepts, Bus Protocols, Measuring Instruments, Resource Allocation, Test Methodology, Project Management, Multitasking, Bilingual

Industry

Manufacturing

Description

Req ID: 128637 Remote Position: No Region: Asia Country: China State/Province: Shanghai City: Shanghai General Overview Functional Area: Engineering Career Stream: Design Engineering Hardware SAP Short Name: SLE-ENG-DHW Job Level: Level 09 IC/MGR: Individual Contributor Direct/Indirect Indicator: Indirect Summary As a Signal Integrity Test and Validation Engineer, you will be part of an exciting team developing, testing, and delivering products for servers/storages/enterprise products. You major duties will be to serve as the hardware validation, verification and analysis for products and provide the support to external and internal customers, team members, and other persons during R&D phase.Detailed Description 1. Main customer contact window for SI/PI test for data center Switches, servers and storages. 2. Lead a project from SI test perspective. Arrange and review SI test work according to project needs. 3. Good team work whether when leading a project or leading a task in a project. 4. Create Signal Integrity Test and Validation Plan for servers/storages/enterprise platform in R&D phase, including resource allocations, test schedule assumptions, and test items scope. 5. Implement specific test items in test plan with schedule. Flexible adjustment should be made based on issue occurring and debugging. 6. Report test/validation execution progress and issues to the R&D team and track the issues from creation to closure. 7. Cooperate with R&D team and other test engineers on debugging, failure analysis and fixing issues discovered during test. 8. Evaluate and develop test methodology to reduce test time and increase test coverage. Knowledge/Skills/Competencies 1. 7 year's minimum experience in hardware board level testing with related knowledge. 2. In-depth understanding of PC/Server/Storage/Switch structure concepts, especially from electrical aspect. 3. Working knowledge of signal integrity theory. 4. Working knowledge of validation of major buses including Memory, LAN, USB, SATA, SAS, PCI Express, 112G/224G SerDes, I2C and SPI etc. 5. Proficiency in analyzing and categorizing signal groups. 6. Good understanding of the principles and basic structures of measuring instruments such as oscilloscopes, PNA, waveform generators and Spectrum Analyzer etc. 7. Strong technical problem solving skills (good mastery on bus protocols and specifications). 8. Strong team work spirit, team leader preferred. 9. Excellent bilingual (Chinese & English) written and verbal communication skills required. 10. Good ability in multi-task and handling a large number of tasks at once. Physical Demands Duties of this position are performed in a normal office environment. Duties may require extended periods of sitting and sustained visual concentration on a computer monitor or on numbers and other detailed data. Repetitive manual movements (e.g., data entry, using a computer mouse, using a calculator, etc.) are frequently required. Occasional travel may be required. Typical Experience 6 to 8 years in a similar role or industry. Typical Education Bachelor degree or consideration of an equivalent combination of education and experience. Educational Requirements may vary by Geography Notes This job description is not intended to be an exhaustive list of all duties and responsibilities of the position. Employees are held accountable for all duties of the job. Job duties and the % of time identified for any function are subject to change at any time.Celestica is an equal opportunity employer. All qualified applicants will receive consideration for employment and will not be discriminated against on any protected status (including race, religion, national origin, gender, sexual orientation, age, marital status, veteran or disability status or other characteristics protected by law). At Celestica we are committed to fostering an inclusive, accessible environment, where all employees and customers feel valued, respected and supported. Special arrangements can be made for candidates who need it throughout the hiring process. Please indicate your needs and we will work with you to meet them. COMPANY OVERVIEW: Celestica (NYSE, TSX: CLS) enables the world’s best brands. Through our recognized customer-centric approach, we partner with leading companies in Aerospace and Defense, Communications, Enterprise, HealthTech, Industrial, Capital Equipment and Energy to deliver solutions for their most complex challenges. As a leader in design, manufacturing, hardware platform and supply chain solutions, Celestica brings global expertise and insight at every stage of product development – from drawing board to full-scale production and after-market services for products from advanced medical devices, to highly engineered aviation systems, to next-generation hardware platform solutions for the Cloud. Headquartered in Toronto, with talented teams spanning 40+ locations in 13 countries across the Americas, Europe and Asia, we imagine, develop and deliver a better future with our customers. Celestica would like to thank all applicants, however, only qualified applicants will be contacted. Celestica does not accept unsolicited resumes from recruitment agencies or fee based recruitment services.

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Responsibilities

The Senior Lead SI Test Engineer will lead hardware validation and verification for server, storage, and enterprise products. This role involves creating test plans, executing tests, and collaborating with R&D teams to resolve issues.