Senior Manager - ASIC Development Engineering (DFT,MBIST,SCAN) at Sandisk

Bengaluru, karnataka, India -

Full Time

Start Date

Immediate

Expiry Date

31 May, 26

Salary

0.0

Posted On

02 Mar, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

SoC DFT Architecture, DFT IP Development, DFT Methodology, SCAN, MBIST, BSDL, ATPG, Simulation, JTAG, Test Clocking, Silicon Debug, Yield Analysis, SoC Architecture, Low-Power Design, PCIe, UFS

Industry

Semiconductor Manufacturing

Description

Company Description At Sandisk, our vision is to power global innovation and push the boundaries of technology to make what you thought was once impossible, possible. At our core, Sandisk is a company of problem solvers. People achieve extraordinary things given the right technology. For decades, we’ve been doing just that. Our technology helped people put a man on the moon. We are a key partner to some of the largest and highest growth organizations in the world. From energizing the most competitive gaming platforms, to enabling systems to make cities safer and cars smarter and more connected, to powering the data centers behind many of the world’s biggest companies and public cloud, Sandisk is fueling a brighter, smarter future. Binge-watch any shows, use social media or shop online lately? You’ll find Sandisk supporting the storage infrastructure behind many of these platforms. And, that flash memory card that captures and preserves your most precious moments? That’s us, too. We offer an expansive portfolio of technologies, storage devices and platforms for business and consumers alike. Our data-centric solutions are comprised of the SanDisk® brands. Today’s exceptional challenges require your unique skills. It’s You & Sandisk. Together, we’re the next BIG thing in data. Job Description We are seeking a highly skilled and experienced DFT Engineer to join our dynamic team of engineers to develop the next-generation Flash Controllers. As an SoC DFT Engineer, you will be responsible for defining and implementing industry leading DFT solutions, with emphasis on SCAN, MBIST, BSDL etc. The ideal candidate will have a deep understanding of DFT Architecture, Implementation flow, MBIST, SCAN ATPG & Simulation expertise. ESSENTIAL DUTIES AND RESPONSIBILITIES: DFT Architecture definitions for SoC development Leading complex activities and providing solutions for complex DFT problems. Collaborate with cross-functional teams to define and refine SoC DFT requirements, ensuring alignment with industry standards and customer needs. Working closely with the Design, Verification, Physical Design & Test Engineering teams while guiding them on the test requirements and methodologies. Work closely with the Product Engineering team and understand the test requirements, get involved in complex silicon debugs. Evaluate all aspects of the SoC DFT flow from requirements, through detailed definitions, and work closely with the CAD to continuously improve the DFT methodology. Qualifications B.Tech / M,Tech / Phd in Electronics, Computer science or Electrical Engineering Minimum 14+ years of experience in DFT Strong understanding of DFT Architecture SKILLS: Extensive experience in SoC DFT architecture, DFT IP development and DFT methodology. Proven track record of driving DFT architecture in complex ASIC designs. Work independently on multiple complex DFT problems across different projects. Proficiency in ASIC DFT Implementation tools, simulation methodologies, and hardware description languages (HDLs). Proficiency in SCAN, MBIST implementation. Solid understanding of JTAG & BSDL standards. Good understanding on Test clocking requirements, Test mode timing closure. Proficiency in complex silicon debugs and yield analysis. Solid understanding of SoC architecture and low-power design principles. Understanding of High-Speed interfaces (PCIe or UFS protocols) and experience with SSD/Flash is advantage. Excellent analytical and problem-solving skills. Strong communication skills and the ability to work effectively in cross-functional teams. Additional Information Sandisk is committed to providing equal opportunities to all applicants and employees and will not discriminate based on their race, color, ancestry, religion (including religious dress and grooming standards), sex (including pregnancy, childbirth or related medical conditions, breastfeeding or related medical conditions), gender (including a person’s gender identity, gender expression, and gender-related appearance and behavior, whether or not stereotypically associated with the person’s assigned sex at birth), age, national origin, sexual orientation, medical condition, marital status (including domestic partnership status), physical disability, mental disability, medical condition, genetic information, protected medical and family care leave, Civil Air Patrol status, military and veteran status, or other legally protected characteristics. We also prohibit harassment of any individual on any of the characteristics listed above. Our non-discrimination policy applies to all aspects of employment. We comply with the laws and regulations set forth in the Equal Employment Opportunity is the Law poster. Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at [email protected] to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying. Job Type (exemption status): Exempt position - Please see related compensation & benefits details below Business Function: ASIC Development Engineering Location (Secondary): Seoul Office--LOC_WDT_KR1101 Work Location: Bangalore PTP Office (IBP)--LOC_WDT_IBP

Responsibilities

The role involves defining and implementing industry-leading Design For Test (DFT) solutions for next-generation Flash Controllers, with a focus on SCAN, MBIST, and BSDL. This includes leading complex DFT activities, collaborating with cross-functional teams, and refining SoC DFT requirements.