Senior Manager Design at Infineon Technologies AG Australia

Bengaluru, karnataka, India -

Full Time

Start Date

Immediate

Expiry Date

25 Mar, 26

Salary

0.0

Posted On

25 Dec, 25

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

RTL Design, SoC Design, Power Topology, Clock Structure, Low-Power Architecture, System Verilog, VHDL, Scripting, Technical Leadership, Mentoring, ARM Processors, High-Speed Interfaces, Digital Design, Analog Design, RF Design, Problem-Solving

Industry

Semiconductor Manufacturing

Description

In your new role, you will: We are scouting for a hands-on, team-oriented RTL Design Engineer with a proven track record. In this role, the engineer will be responsible for RTL Design of SoCs in which sub-systems/IPs are integrated. We are looking for a self-motivated and experienced engineer who can work with minimal supervision in our SoC team and be able to work closely with our global design teams RTL Design/Integration for IoT SoCs Work with digital/analog/RF IP teams to arrive IP configuration at the SoC level Drive power topology at the SoC level, clock structure, and reset strategy Identify low-power opportunities at the SoC level Define the power intent of SoC and arrive IO requirements/mixing Integration of sub-systems/IPs while considering sub-system/IP features/configurations/generics, power/clock/reset, standard/proprietary interface requirements Drive analysis of CDC, lint, and low power reports. Deliver synthesis constraints at the SoC level Participate, as applicable, in silicon debug activities. Help, drive improvements on-the-fly (as project executes) Ensure an inclusive teamwork environment, inspire team members, and role model. Work effectively with several stakeholder teams globally. You are best equipped for this task if you have: B Tech with 12+ years of experience or M Tech with 10+ years of experience in IP Design with a few years of experience in SoC design Must have several years of experience in technical leadership and mentoring junior engineers. Must have expertise in processor-based SoC design, which includes (but is not limited to), ARM processors, DMAs, power/clock/reset controllers,low-power architecture, interfaces like USB/SDIO/PCIe/SPI/UART Must have a good understanding of high-speed interfaces like USB, SDIO, PCIe, and a proven track record in such developments. Expertise in System Verilog/VHDL languages Expertise with scripting Team player with good communication skills, strong analytical and problem-solving skills Familiarity with Security architecture/requirements is a plus #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills. Learn more about our various contact channels. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process. Click here for more information about Diversity & Inclusion at Infineon.

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Responsibilities

The Senior Manager Design will be responsible for RTL Design of SoCs, integrating sub-systems and IPs while collaborating with global design teams. The role includes driving power topology, identifying low-power opportunities, and ensuring effective teamwork.