Senior Mask Design Engineer (Mask Design and Layout Engineering) with 4 to at Sandisk

Bengaluru, karnataka, India -

Full Time

Start Date

Immediate

Expiry Date

18 Oct, 26

Salary

0.0

Posted On

20 Jul, 26

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Mask Design, Layout Engineering, Analog IC Design, Digital IC Design, Mixed-Signal IC Design, DRC, LVS, Cadence Virtuoso, Synopsys, Calibre, Mentor Graphics, VLSI Design, Fabrication Processes, Design Rules, Manufacturability, Mentorship

Industry

Semiconductor Manufacturing

Description

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Job Description The Indivisual must meet the following Job description: Layout design: Create and optimize mask layouts for analog, digital, and mixed-signal ICs. Execution excellence: Work independently and deliver high-quality results with minimal supervision. Verification: Perform DRC, LVS, and reliability checks to ensure compliance with design rules. Collaboration: Work closely with circuit designers, process engineers, and integration teams. EDA tools expertise: Use Cadence Virtuoso, Synopsys, Calibre, and Mentor Graphics for layout and verification. Mentorship: Guide junior engineers and promote best practices. Qualifications Educational background: Bachelor’s or Master’s degree in Electrical Engineering, Electronics, or VLSI Design. Industry experience: 7+ years of hands-on expertise in mask design and layout engineering. Semiconductor knowledge: Strong understanding of fabrication processes, design rules, and manufacturability. Problem-solving ability: Demonstrated analytical skills to resolve complex design challenges. Communication & teamwork: Excellent collaboration and interpersonal skills. Additional Information All your information will be kept confidential according to EEO guidelines. Job Type (exemption status): Exempt position - Please see related compensation & benefits details below Business Function: Mask Design Engineering Work Location: Bangalore PTP Office (IBP)--LOC_WDT_IBP

Responsibilities

Create and optimize mask layouts for analog, digital, and mixed-signal ICs while performing DRC and LVS verification. Collaborate with circuit designers and process engineers to ensure design rule compliance and mentor junior engineers.