Senior NPI Product Engineer at Semtech Limited

Bristol, England, United Kingdom -

Full Time

Start Date

Immediate

Expiry Date

09 Oct, 26

Salary

0.0

Posted On

12 Jul, 26

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

NPI Program Support, Design for Testability, Design for Manufacturability, ATE Test Programs, Product Characterisation, Data Analysis, Yield Optimisation, Failure Analysis, Root Cause Investigation, Semiconductor Physics, Analog/Mixed-Signal IC Design, Statistical Theory, JMP, Excel, High-speed Digital ATE, Reliability Testing

Industry

technology;Information and Internet

Description

Responsibilities 1. NPI Program Support & Cross-Functional Collaboration (25%) Support NPI activities from product concept through final product release, assisting in ensuring product conformance to specifications and seamless transfer to full-volume manufacturing Collaborate with internal cross-functional teams, including Project Lead, Design, Marketing, Validation, Test Engineering, Characterisation, Quality & Reliability, Applications Engineering and Operations under the direction of senior engineers Assist in tracking backend NPI development through product transfer, and participate in milestone reviews of NPI program logistics, timelines and milestones Support preparation of NPI product release deliverables and OSAT-related manufacturing documentation, ensuring accuracy and completeness Receive technical mentorship from senior engineers and actively develop technical skills and product knowledge 2. Design for Testability/Manufacturability (35%) Support the definition of Design for Testability (DfT) and Design for Manufacturability (DfM) requirements for NPI products under the guidance of senior engineers Assist test engineers in the development, implementation, verification and optimisation of ATE test programs, learning how testability and manufacturability features are implemented and evaluated Support product characterisation, correlation, and release activities, contributing to execution and adherence to product specifications and quality standards Assist in finalising datasheet specifications and ATE production test limits under senior engineer direction, gaining exposure to data-driven, statistically validated limit-setting processes 3. Characterisation, Data Analysis & Yield Optimisation (30%) Assist in developing product characterisation plans for wafer-level and bench characterisation tests, building understanding of test coverage requirements across product specifications and operating conditions Perform data analysis of ATE and bench characterisation results across PVT variations, including ATE-to-bench correlation studies and process capability analysis, with guidance from senior engineers Support yield modelling activities to develop a foundational understanding of yield and quality drivers Assist in planning and executing Design of Experiments (DOE) to support yield analysis, test time reduction, and test optimisation efforts Support product validation and reliability qualification activities in collaboration with Test, Characterisation, Validation and Reliability Engineering teams Assist in identifying yield loss Pareto opportunities and contribute to implementing targeted solutions under the senior engineer's direction 4. Manufacturing Quality, Failure Analysis & Continuous Improvement (10%) Assist in monitoring yields and quality metrics across processing steps, learning to identify trends and anomalies Support review of test coverage, test limits, and guard banding under the guidance of senior engineers Assist in failure analysis and root cause investigation activities for field returns and RMA cases, contributing to corrective and preventive action (CAPA) development Support collaboration with foundry process and packaging engineering teams in resolving issues during wafer fabrication, packaging, die sort, and final package test Contribute to product life cycle monitoring activities, learning to identify opportunities for cost reduction and continuous improvement Minimum Qualifications BS in Electrical Engineering or a related field (MS a plus) 5-8 years of experience in semiconductor product engineering, test engineering, or design engineering; internship or co-op experience in relevant fields considered Basic familiarity with statistical theory and data analysis tools (e.g. Excel, JMP) for data interpretation and reporting Foundational knowledge of semiconductor physics and analog/mixed-signal IC design principles Exposure to or coursework in DFM, DFT, and ATE test methodologies is a plus Familiarity with high-speed digital ATE test platforms (e.g. Advantest, Teradyne) or bench test equipment is a plus Basic awareness of semiconductor qualification processes and reliability testing methodologies (JEDEC, HTOL, ESD, Latch-up) is a plus Strong analytical, problem-solving, and communication skills with an eagerness to learn in a fast-paced engineering environment This job description intends to describe the major duties and responsibilities performed by incumbents of this job. Incumbents may be required to perform job-related tasks other than those specifically included in this description. All duties and responsibilities are essential job functions and requirements and are subject to possible modification to reasonably accommodate individuals with disabilities. Semtech Corporation (Nasdaq: SMTC) is a high-performance semiconductor, IoT systems and Cloud connectivity service provider dedicated to delivering high quality technology solutions that enable a smarter, more connected and sustainable planet. Our global teams are dedicated to empowering solution architects and application developers to develop breakthrough products for the infrastructure, industrial and consumer markets. To learn more about Semtech technology, visit us at Semtech.com or follow us on LinkedIn or Twitter.

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Responsibilities

Support NPI activities from concept to release, ensuring product conformance and seamless transfer to manufacturing. Focus on DfT/DfM requirements, product characterization, yield optimization, and failure analysis for semiconductor products.