Senior PCB Layout Engineer at Keysight Technologies
Calabasas, CA 91302, USA -
Full Time


Start Date

Immediate

Expiry Date

17 Oct, 25

Salary

97.79

Posted On

18 Jul, 25

Experience

6 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

Materials, Meeting Commitments, Library Management, Lvds, Assembly Processes, Cam, Dft, Design, Communication Skills, Electronics, Orcad, English, Manufacturing, Pcb Design

Industry

Electrical/Electronic Manufacturing

Description

DESCRIPTION:

Keysight-ISG Network Test Solutions is looking for a Senior PCB Layout Engineer to contribute to our high speed and complex designs.

  • Candidates joining our team will have great impact and help drive success, by collaborating and participating in new product design and development.
  • Great opportunity to become a member of a well-respected and dynamic team.
  • Develop state-of-the-art IP test products.
  • Design high speed printed circuit boards.
  • Collaborate in an open team environment.

JOB REQUIREMENTS:

  • 6+ years of experience in PCB design.
  • Knowledgeable of electronics; formal education recommended.
  • Advanced Cadence Allegro skills; familiar with CAM 350, OrCad or comparable tools.
  • Experience with mixed signal high speed digital up to 100MHZ to 53GHz, 224G, PAM4.
  • Experience with design rule checks (DRC), layout versus schematic checks, and library management.
  • Knowledge of design for manufacturing (DFM) and design for test (DFT).
  • Experience with DDR4 DRAM, 2-3 Gbps serial interfaces, LVDS, split power planes, impedance control and matched trace lengths.
  • Familiar with fabrication and assembly processes and materials.
  • Willing to adjust current practices to conform to company standards and methods.
  • Committed to accuracy, quality and meeting commitments.
  • Strong verbal and written communication skills; fluent in English.

QUALIFICATION/LICENSURE

Work Authorization : Green Card, US Citizen, Other valid work visa
Preferred years of experience : 6 years
Travel required : No travel required
Shift timings : Work Schedule/Hours: Monday thru Friday, 40 hours/week

Responsibilities
  • Design complex, 30+ layer PCB with multiple high density BGAs using Cadence Allegro.
  • Build symbols, develop stack ups, prescribe pin swaps, import netlist and constraints, familiar with Cadence CM front to back flow.
  • Check peer designs and library symbols.
  • Take input from and negotiate changes with electrical and mechanical design engineers during development.
  • Interface with suppliers to resolve manufacturing related issues.
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