Senior Power Systems Engineer at HP Law

San Francisco, California, United States -

Full Time

Start Date

Immediate

Expiry Date

21 May, 26

Salary

240000.0

Posted On

20 Feb, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Power Systems Engineering, System Architecture, Modeling, Optimization, Low Power Architectures, SoC States, Sensor Architecture, Audio Architecture, Battery Management, Charging Profile Definition, Power Experiments, Telemetry, Firmware, Hardware, Python, Matlab

Industry

IT Services and IT Consulting

Description

Who We Are HP IQ is HP’s new AI innovation lab. Combining startup agility with HP’s global scale, we’re building intelligent technologies that redefine how the world works, creates, and collaborates. We’re assembling a diverse, world-class team—engineers, designers, researchers, and product minds—focused on creating an intelligent ecosystem across HP’s portfolio. Together, we’re developing intuitive, adaptive solutions that spark creativity, boost productivity, and make collaboration seamless. We create breakthrough solutions that make complex tasks feel effortless, teamwork more natural, and ideas more impactful—always with a human-centric mindset. By embedding AI advancements into every HP product and service, we’re expanding what’s possible for individuals, organisations, and the future of work. Join us as we reinvent work, so people everywhere can do their best work. About The Role HP IQ is seeking a Senior Power Systems Engineer to drive end to end system architecture, modeling, and optimization for wearable platforms. The candidate will build power models, define system use cases and operating modes, partner with product and engineering teams to meet aggressive power targets, and define manufacturing tests and field telemetry for NPI. The ideal candidate brings strong systems thinking, hands-on experience with low power architectures, and the ability to build models and telemetry to drive tradeoffs from SOC level to board level to maximize user runtime. What You Might Do: Power architecture responsibility for a wearable device covering SoC states, sensor, audio, and memory architecture tradeoffs at board level. Battery, PCM, and charging profile definition and validation Design power experiments, test plans, and measurement & telemetry mechanisms across firmware and hardware to optimize power and performance. Build and maintain system-level power models to model expected power consumption for user profiles. Map power models by subsystem, correlating modeled behavior with instrumented measurements. Define user profiles, power and sleep states, and low-power operating modes Partner closely with product, hardware, firmware, manufacturing, and regression QA to drive alignment and execution toward power targets. Essential Qualifications Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, or related technical field. 8+ years of experience in power systems, systems engineering, or related domains. Experience optimizing multi-core SoCs, understanding of power systems at the platform or system level. Experience building and correlating power models to instrumented tests. Ability to communicate technical concepts clearly and collaborate across engineering teams. Preferred Skills Experience with ARM-based embedded systems and profilers, including power supplies and power management ICs. Experience with power and performance characterization, validation, and correlation to real system behavior using bench equipment and scripts in python or matlab. Prior experience in computing platforms, servers, workstations, or embedded systems. Demonstrated ability to influence system design decisions using data and analysis. Experience working in a power-focused systems or architecture team. Salary Range: $170,000 to $240,000 Compensation & Benefits (Full-Time Employees) The salary range for this role is listed above. Final salary offered is based upon multiple factors including individual job-related qualifications, education, experience, knowledge and skills. At HP IQ, we offer a competitive and comprehensive benefits package, including: Health insurance Dental insurance Vision insurance Long term/short term disability insurance Employee assistance program Flexible spending account Life insurance Generous time off policies, including; 4-12 weeks fully paid parental leave based on tenure 11 paid holidays Additional flexible paid vacation and sick leave (US benefits overview) Why HP IQ? HP IQ is HP’s new AI innovation lab, building the intelligence to empower humanity—reimagining how we work, create, and connect to shape the future of work. Innovative Work Help shape the future of intelligent computing and workplace transformation. Autonomy and Agility Work with the speed and focus of a startup, backed by HP’s scale. Meaningful Impact Build AI-powered solutions that help people and organisations thrive. Flexible Work Environment Freedom and flexibility to do your best work. Forward-Thinking Culture We learn fast, stay future-focused, and imagine what comes next—together. Equal Opportunity Employer (EEO) Statement HP, Inc. provides equal employment opportunity to all employees and prospective employees, without regard to race, color, religion, sex, national origin, ancestry, citizenship, sexual orientation, age, disability, or status as a protected veteran, marital status, familial status, physical or mental disability, medical condition, pregnancy, genetic predisposition or carrier status, uniformed service status, political affiliation or any other characteristic protected by applicable national, federal, state, and local law(s). Please be assured that you will not be subject to any adverse treatment if you choose to disclose the information requested. This information is provided voluntarily. The information obtained will be kept in strict confidence. If you’d like more information about HP’s EEO Policy or your EEO rights as an applicant under the law, please click here: Equal Employment Opportunity is the Law Equal Employment Opportunity is the Law – Supplement

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Responsibilities

The Senior Power Systems Engineer will drive end-to-end system architecture, modeling, and optimization for wearable platforms, including defining use cases, operating modes, and partnering with teams to meet aggressive power targets. Responsibilities also involve building and maintaining system-level power models, defining manufacturing tests, and validating power consumption across various subsystems.