JOB DESCRIPTION

The Senior Signal Integrity Engineer at General Motors plays a crucial role in ensuring the performance and reliability of high-speed hardware designs within the ECU Electrical team. This position involves analyzing and mitigating signal degradation issues, collaborating with cross-functional teams, and optimizing design processes to support the development of next-generation automotive systems. The engineer will lead product development and integration activities, focusing on in-vehicle electronics and cutting-edge technologies.

• Perform detailed signal integrity (SI) simulations using tools such as HyperLynx, HFSS, or CST to identify and resolve issues related to crosstalk, signal loss, reflections, and other performance degradations in high-speed designs.
• Analyze PCB layout designs to ensure optimal signal performance, providing feedback and recommendations to layout and hardware design teams.
• Collaborate with hardware engineers to optimize high-speed signal paths, ensuring adherence to specifications for interfaces like DDR, PCIe, USB, SerDes, and Ethernet.
• Evaluate and validate signal integrity for power delivery networks (PDN) to minimize noise, ground bounce, and power/ground integrity issues.
• Work closely with PCB layout, hardware, and mechanical teams to ensure design choices align with signal integrity best practices.
• Partner with systems engineering and software teams to ensure signal integrity across the entire product stack, from silicon to system integration.
• Develop and implement test strategies for verifying signal integrity on prototypes and final products using tools like oscilloscopes, vector network analyzers (VNA), and time domain reflectometry (TDR).
• Create and maintain signal integrity design guidelines, best practices, and checklists to support hardware engineers throughout the product development lifecycle.
• Lead the evaluation of new materials, design techniques, and tools that enhance signal integrity, proposing innovations that improve overall system performance.
• Diagnose and resolve SI issues during the bring-up phase of new products, ensuring minimal impact on time-to-market.

REQUIREMENTS:

• Bachelor’s or Master’s degree in Electrical Engineering, Electronics Engineering, or a related field.
• 5+ years of experience in signal integrity, high-speed PCB design, or related areas in hardware engineering.
• Strong understanding of high-speed signal transmission principles, including impedance, crosstalk, noise, and signal attenuation.
• Proficiency in SI analysis tools such as HyperLynx, HFSS, CST, ADS, or similar industry-standard software.
• Hands-on experience with lab equipment such as oscilloscopes, VNAs, TDRs, and protocol analyzers.
• Expertise in PCB layout and design rules for high-speed, multi-layer boards.
• Familiarity with current SI trends, emerging technologies, and innovations in high-speed data transmission.
• Ability to contribute to process improvements and the development of new methodologies for signal integrity analysis.
  

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Compensation:
The compensation information is a good faith estimate only. It is based on what a successful applicant might be paid in accordance with applicable state laws. The compensation may not be representative for positions located outside of New York, Colorado, California, or Washington.
The expected base compensation for this role is: $131,000 - $202,000. Actual base compensation within the identified range will vary based on factors relevant to the position.
Bonus Potential: An incentive pay program offers payouts based on company performance, job level, and individual performance.
Benefits : GM offers a variety of health and wellbeing benefit programs. Benefit options include medical, dental, vision, Health Savings Account, Flexible Spending Accounts, retirement savings plan, sickness and accident benefits, life insurance, paid vacation & holidays, tuition assistance programs, employee assistance program, GM vehicle discounts and more.

The Senior Signal Integrity Engineer at General Motors plays a crucial role in ensuring the performance and reliability of high-speed hardware designs within the ECU Electrical team. This position involves analyzing and mitigating signal degradation issues, collaborating with cross-functional teams, and optimizing design processes to support the development of next-generation automotive systems. The engineer will lead product development and integration activities, focusing on in-vehicle electronics and cutting-edge technologies.

• Perform detailed signal integrity (SI) simulations using tools such as HyperLynx, HFSS, or CST to identify and resolve issues related to crosstalk, signal loss, reflections, and other performance degradations in high-speed designs.
• Analyze PCB layout designs to ensure optimal signal performance, providing feedback and recommendations to layout and hardware design teams.
• Collaborate with hardware engineers to optimize high-speed signal paths, ensuring adherence to specifications for interfaces like DDR, PCIe, USB, SerDes, and Ethernet.
• Evaluate and validate signal integrity for power delivery networks (PDN) to minimize noise, ground bounce, and power/ground integrity issues.
• Work closely with PCB layout, hardware, and mechanical teams to ensure design choices align with signal integrity best practices.
• Partner with systems engineering and software teams to ensure signal integrity across the entire product stack, from silicon to system integration.
• Develop and implement test strategies for verifying signal integrity on prototypes and final products using tools like oscilloscopes, vector network analyzers (VNA), and time domain reflectometry (TDR).
• Create and maintain signal integrity design guidelines, best practices, and checklists to support hardware engineers throughout the product development lifecycle.
• Lead the evaluation of new materials, design techniques, and tools that enhance signal integrity, proposing innovations that improve overall system performance.
• Diagnose and resolve SI issues during the bring-up phase of new products, ensuring minimal impact on time-to-market