Senior Silicon Design Engineer at Advanced Micro Devices, Inc

George Town, Penang, Malaysia -

Full Time

Start Date

Immediate

Expiry Date

03 Mar, 26

Salary

0.0

Posted On

03 Dec, 25

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

RTL Design, Verilog HDL, Digital IP Development, Computer Architecture, ASIC Design Cycle, Design Verification, Synthesis, Timing Closure, High-Speed IO Controller Design, EDA Tools, Unix/Linux, Scripting, Interpersonal Skills, Communication Skills, Team Collaboration, Workflow Automation

Industry

Semiconductor Manufacturing

Description

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: Push Boundaries, Deliver Innovation and Change the World! In this role you will be given an opportunity to work on the next generation technology that will be part of future AMD Microprocessors powering Gaming Consoles, Servers and Personal Computers as well as Graphics Cards and VR sets. This team also is responsible for the Design and Verification of several critical as well as the integration to other subsystems and SOC. The Design and Design Verification groups within this team are also responsible for developing a balanced architecture between power consumption and performance, delivering high complexity RTL code and creating advanced testbenches using cutting edge verification techniques. KEY RESPONSIBILITIES: Develop RTL code for high-speed IO controller blocks in Verilog HDL and make sure functional correct and reusable for different configuration. Work in synthesis and netlist delivery that meets timing, area and power bounding box. Assist physical design team on the floor-planning and timing closure. Work with Design Verification team to ensure quality for architecture definition and design implementation. PREFERRED EXPERIENCE: Over 7 years of digital IP/SoC development Good working experience in computer architecture and interconnects. Good working experience in full ASIC design cycle: requirements definition, architectural and micro-architectural specification, RTL, design verification, floor-planning, synthesis, timing closure, post-silicon validation Good command of Verilog RTL design and has experience of large digital ASIC project. Familiarity in high-speed IO controller design (e.g. USB, Thunderbolt, UFS) is a plus. Working experience in with front-end EDA tools and flows. Working experience with Unix/Linux and scripts (tcl, perl, ruby and etc.) Excellent interpersonal, communication, and writing skills. Able to provide clear and logical presentations and documentation. Has an open mind and attitude. Transparent. Willing to admit and learn from mistakes. Works well with others in a team environment. Automating workflows in a distributed compute environment. Capable of independently driving tasks and activities to completion in an organized and timely manner with excellent quality. ACADEMIC CREDENTIALS: Major in EE, CS or related, Master’s Degree with 5+ years or Bachelor’s with 7+ years working experiences. LOCATION: Penang, Malaysia #LI-FL1 #LI-Hybrid Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Responsibilities

Develop RTL code for high-speed IO controller blocks and ensure functional correctness. Collaborate with the Design Verification team to maintain quality in architecture definition and design implementation.