PREFERRED EXPERIENCE:

• Basic understanding of FPGA architecture
• Knowledge of and/or experience with design and verification tools such as Virtuoso and Calibre
• Knowledge of and/or experience with P&R tools
• Fundamental circuit design knowledge including simulation experience with Spice and Verilog
• Strong debug skills
• Scripting experience using Perl, Python, TCL, C-shell, Make and/or other scripting languages
• Knowledge and experience with basic Unix data management and job control
• Excellent written and oral communication skills

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
Responsibilities:

THE ROLE:

As a member of the SoC Physical Integration team, you’ll interface with various engineering groups, including architecture, design, CAD, software, and product engineering, across various geographies to work towards the physical/electrical verification and tape out of AMD SoC FPGA/ACAP devices.

KEY RESPONSIBILITIES:

Common essential duties and responsibilities include, but are not limited to:

• Defining and developing flows and methodologies for chip level integration
• Developing tools for design verification or efficiency
• Designing (RTL and custom), verifying, and integrating FPGA/ACAP sub-blocks
• Coordinating activities between different design groups to ensure smooth integration
• Executing chip level physical verification
• Executing chip level electrical verification