Senior Silicon Validation Engineer at Intel - Dubai

Haifa, Haifa District, Israel -

Full Time

Start Date

Immediate

Expiry Date

14 Mar, 26

Salary

0.0

Posted On

14 Dec, 25

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Silicon Validation, Post-Silicon Validation, PCIe, HBM, UCIe, Debug Methodology, C/C++, System-Level Debug, Validation Tools, SoC Architecture, Mentoring, Collaboration, Characterization, Root-Cause Analysis, Electrical Characterization, Signal Integrity

Industry

Semiconductor Manufacturing

Description

Job Details: Job Description: Be part of Intel’s AI Group and help shape the silicon behind Intel’s most advanced AI platforms. In this role, you will part of a team leading post-silicon validation of the latest, cutting-edge PCIe, HBM, and Die-to-Die (D2D/UCIe) technologies in complex AI SoCs. You will tackle the most challenging silicon issues, define and drive validation strategy, and work closely with architecture, design, firmware, and platform teams to deliver robust, high-performance, production-ready silicon. Key Responsibilities : Lead post-silicon validation for one of following domains in AI accelerators and SoCs: PCIe, HBM, UCIe. Define validation strategy, coverage, and debug methodology across multiple high-speed interfaces. Mentor and provide technical guidance to junior and mid-level validation engineers. Execute pre-silicon and post-silicon validation, drive first power-on, bring-up, characterization, and production readiness activities. Debug complex, system-level issues spanning protocol, firmware, electrical, and platform layers. Develop and review validation tests, automation, and debug tools (primarily C/C++). Collaborate with architecture, design, firmware and platform teams to influence design robustness and future architectures. Represent validation in cross-functional reviews and silicon readiness milestones. Qualifications: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field. 8+ years of hands-on post-silicon validation experience in high-speed I/O and/or memory subsystems. Strong expertise in one domain (PCIe, HBM, or UCIe). Deep understanding of system-level bring-up, debug, and root-cause analysis on complex SoCs. Extensive experience with validation and debug tools (protocol analyzers, exercisers, scopes, logic analyzers). Proficiency in C/C++ for validation, automation, and debug development. Strong understanding of SoC architecture. Preferred Qualifications Experience with PCIe Gen5/Gen6, advanced HBM generations, or UCIe-based designs. Background in AI accelerators, GPUs, chiplets, or high-performance computing platforms. Knowledge of signal integrity, electrical characterization, and high-speed interface bring-up. Experience influencing silicon architecture or driving cross-team technical initiatives. Strong understanding of Linux-based validation environments. Job Type: Experienced Hire Shift: Shift 1 (Israel) Primary Location: Israel, Haifa Additional Locations: Business group: At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change. Intel’s official careers website. Find your next job and take on projects that shape tomorrow’s technology. Benefits Internships Life at Intel Locations Recruitment Process Discover your place in our world-changing work.

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Responsibilities

Lead post-silicon validation for AI accelerators and SoCs, defining validation strategy and debugging complex system-level issues. Collaborate with cross-functional teams to ensure robust and high-performance silicon delivery.