WE ARE:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

• Reviewing SERDES standards to develop innovative transceiver architectures and sub-block specifications for Multi-Gbps NRZ & PAM4 SERDES IP.
• Investigating and architecting advanced circuit solutions to overcome bottlenecks, achieving breakthroughs in power efficiency, area reduction, and performance.
• Collaborating with cross-functional teams—including analog, digital, and layout engineers—to optimize design and verification strategies for superior quality and project efficiency.
• Presenting and critically reviewing simulation data within project teams and at external industry panels or customer meetings.
• Overseeing physical layout to minimize parasitics, device stress, and process variations, ensuring robust manufacturability and reliability.
• Documenting design features, creating comprehensive test plans, and ensuring traceability throughout the development lifecycle.
• Consulting on electrical characterization of SERDES IP, analyzing customer silicon data, and proposing enhancements or post-silicon updates as needed.