Senior Staff Design Engineer. at Infineon Technologies AG Australia

Bengaluru, karnataka, India -

Full Time

Start Date

Immediate

Expiry Date

05 Apr, 26

Salary

0.0

Posted On

05 Jan, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

ASIC Design, Scripting, Perl, Python, RTL Design, Verilog, LINT, Clock-Domain-Crossing, UPF, MVRC, Synthesis, Timing Constraints, Debugging, DFT, Fault-Grading, Logic IP, SoC Design

Industry

Semiconductor Manufacturing

Description

Job Description In your new role you will: Candidate will be responsible for building/maintaining highly configurable and reusable IO Subsystems (Note: An IO Subsystem is a logic IP that processes the IO Pads/IO Ring information and required logic to allow multiple on-chip peripherals to share the same IOs in a configurable manner) Candidate will be responsible for RTL design for integration of IO pads into SoC, building the required multiplexing logic and necessary power control signals integration. Strong fundamentals in DFT/Fault-grading and/or hands on experience. Significant Technical Contribution in to Logic IP/SoC Design &Architectural activities. Sound & Practical Written and Verbal Communication Skills. Your Profile You are best equipped for this task if you have: Must have worked in ASIC Design flow, with ASIC experience of 7 to 12years. Must be strong in scripting using Perl/Python Must be familiar with RTL design for ASIC development using Verilog. Must be familiar with LINT (LEDA/Spyglass),Clock-Domain-Crossing analysis, UPF, MVRC, Synthesis, Timing constraints and debugging STAreports. Strong mindset towards automation of repetitive work. Strong fundamentals in DFT/Fault-grading and/or hands on experience. Significant Technical Contribution into Logic IP/SoC Design &Architectural activities. Sound & Practical Written and Verbal Communication Skills. Moderate Individual Contributor with Freedom to Act, Team work and Learn Contact: swati.gupta@infineon.com #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process. Click here for more information about Diversity & Inclusion at Infineon.

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Responsibilities

The candidate will be responsible for building and maintaining highly configurable IO Subsystems and for RTL design for the integration of IO pads into SoC. They will also contribute significantly to Logic IP/SoC Design and Architectural activities.