Senior Staff Engineer Analog Layout at Infineon Technologies AG Australia
Simpang Ampat, Penang, Malaysia -
Full Time


Start Date

Immediate

Expiry Date

19 Feb, 26

Salary

0.0

Posted On

21 Nov, 25

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

Analog Layout, Layout Verification, Troubleshooting, IR Drop Analysis, EM Analysis, Submicron CMOS Technologies, Technical Skills, Analytical Skills, Problem-Solving Skills, Team Player, Interpersonal Skills, Verbal Communication, Initiative

Industry

Semiconductor Manufacturing

Description
Participate in block/IP/chip floor planning from scratch, performing routing & layout verification (such as LVS, DRC, Antenna & others) and troubleshooting the results Bachelor's Degree in Electrical/Electronic Engineering/Physics with VLSI exposure or equivalent 9 to 14 years of job experience in layout design field is preferred. Hands-on experience in analog layout from scratch, implementation of analog layout techniques, IR drop/EM analysis Deep understanding of analog circuit layout concepts in submicron CMOS technologies Possess strong technical, analytical & problem-solving skills in layout design Ability to work as strong team player and participate in cross-functional activities Good interpersonal, verbal and communication skill with good initiative at work We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process.

How To Apply:

Incase you would like to apply to this job directly from the source, please click here

Responsibilities
Participate in block/IP/chip floor planning from scratch, performing routing and layout verification. Troubleshoot results and ensure compliance with design specifications.
Loading...