Start Date
Immediate
Expiry Date
29 May, 26
Salary
0.0
Posted On
28 Feb, 26
Experience
2 year(s) or above
Remote Job
Yes
Telecommute
Yes
Sponsor Visa
No
Skills
UVM, System Verilog, NAND, DDR, PCIe, ASIC Simulation Tools, Constrained Random Verification, Functional Coverage Closure, SOC Design, Test Bench Development, Debugging, Verification Methodologies, Test Plan Definition
Industry
Semiconductor Manufacturing