Senior Staff Engineer Verification at Infineon Technologies AG Australia

Bengaluru, karnataka, India -

Full Time

Start Date

Immediate

Expiry Date

30 May, 26

Salary

0.0

Posted On

01 Mar, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Mixed Signal SOCs, AMS Verification, Verilog, Wreal, SV-RNM, Test Plan Preparation, Cadence irun/xrun, Synopsys XA-VCS, Mentor Eldo ADMS, Behavioral Modeling, Scripting, Perl, Skill, Python, Tcl, UVM

Industry

Semiconductor Manufacturing

Description

#WeAreIn to leverage synergies contributing to Infineon’s product development. Are you in? Your Role Key responsibilities in your new role To work in AMS Verification domain with relevant experience in mixed signal SOCs or subsystems/IPs. Leading a project for AMS requirements is a value add Behavioral modeling: Verilog, Wreal or SV-RNM -Full AMS Verification for SoC or IPs -Full Test plan preparation as per the dynamics of product specifications - Full Dealing challenges with AMS methodologies of Cadence: irun/xrun or Synopsys: XA-VCS or Mentor Eldo ADMS -Partial Testcase Debug & proposing new scenarios - Partial Handling project dynamics on scope, schedule and effort – coming up with alternative verification plans- Full Self-motivated to drive new scope expansion proposals mapping to business value Mentoring junior engineers in creating problem solving mindset Establishing cross collaboration with other domains and coming up with proposals in enhancing product development working approaches Your Profile Qualifications and skills to help you succeed Bachelors with 9+ years of experience Mentoring: Technical mentoring for junior engineers. Instigate thought-provoking culture Candidate should have working experience with AMS Verification on multiple SOC’s or sub-systems/IPs Should have proficiency in AMS simulation environment using Cadence/Synopsys/Mentor tools Knowledge of digital design techniques, Verilog HDL, and standard RTL coding styles, as well as analog circuit basics, with previous analog design experience a plus Candidate should be familiar with the concepts of behavioral modeling - both digital (Verilog-D) and analog (Verilog-A or Verilog-AMS) Experience in SV and UVM testbench development/modifications from mixed signal perspective is a plus Functional knowledge of analog and mixed signal building blocks, such as comparators, op-amps, switched cap circuits, various types of ADCs and DACs, current mirrors, charge pumps, and regulators is expected Working knowledge of Perl / Skill/ Python/Tcl or other scripting relevant language is a plus. Candidate should have ability to lead a project team, and work collaboratively in a multi-site development environment Schedule and result oriented execution mindset, flexible in working as per the project scope needs, Exploring and experimentation for continuous methodology improvements Contact: Gowri Shenoy, LinkedIn #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills. Learn more about our various contact channels. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process. Click here for more information about Diversity & Inclusion at Infineon.

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Responsibilities

The role involves working in the AMS Verification domain, leading projects for AMS requirements, and being responsible for full AMS verification of SoCs or IPs, including test plan preparation and debugging test cases. The engineer will also mentor junior staff, drive scope expansion proposals, and establish cross-collaboration with other domains to enhance product development approaches.