Senior Staff Tape Out Enablement Engineer at Infineon Technologies AG Australia

, , Malaysia -

Full Time

Start Date

Immediate

Expiry Date

25 Apr, 26

Salary

0.0

Posted On

25 Jan, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Electrical Engineering, Physics, Semiconductor Industry, New Technology Introduction, Tapeout Enablement, Semiconductor Manufacturing Processes, CMOS, FinFET, Physical Verification, Signoff Tools, Foundries, Mask Preparation, Design For Manufacturability, AI/ML Applications, Technical Leadership, Communication Skills

Industry

Semiconductor Manufacturing

Description

Your Role Key responsibilities in your new role Be responsible for enabling tapeouts at New Technology introduction (NTI) and transfers for both inhouse and external fabs As Work Package Owner in NTI projects be responsible for planning and tracking of high-quality and in-time tapeout deliveries Partner with cross-functional teams, including technology development, design and manufacturing for a seamless technical support while handling at the same time shifting priorities and timelines Take the lead within the NTI project for the definition and implementation of the best fit to the internal gds2mask and tapeout management system Work closely with relevant stakeholders, both in house and at foundries, to implement robust and efficient and DfM-aware tapeout processes along the qualification and production flows Be for all tapeout aspects the technical interface to the foundries of interest and responsible for building and maintaining relationships for successful tapeout enablement Provide technical guidance and support to internal design teams on foundry-specific design, verification and tapeout requirements Your Profile Qualifications and skills to help you succeed A degree in Electrical Engineering, Physics or a similar discipline Minimum 10+ years of experience in semiconductor industry, with a focus on new technology introduction and tapeout enablement In-depth knowledge of semiconductor manufacturing processes and technologies in CMOS, FinFET, Discretes Experience with physical verification and signoff tools (e.g., Cadence, Synopsys, etc.) Proven experience with foundries (TSMC, GlobalFoundries, UMC, etc.) Familiarity with mask and data preparation tools and methodologies Strong understanding of design for manufacturability (DFM) principles and requirements Affinity to or experience with AI/ML driven application in semiconductor design and manufacturing Strong technical leadership and communication skills, with experience in guiding cross-functional teams and collaborating with senior management Ability to work in an international, multicultural and multidisciplinary environment #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills. Learn more about our various contact channels. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process.

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Responsibilities

The role involves enabling tapeouts for new technology introductions and managing high-quality tapeout deliveries. The engineer will also act as a technical interface to foundries and provide guidance to internal design teams.