Senior System Design Engineer, Pathfinding at Micron Technology
Boise, Idaho, United States -
Full Time


Start Date

Immediate

Expiry Date

10 Mar, 26

Salary

0.0

Posted On

10 Dec, 25

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

ASIC Design, Verilog, System Verilog, Scripting Languages, Analytical Skills, Problem-Solving, Collaboration, Computer System Architecture, Communication Skills, Backend Synthesis, Physical Design, High-Level Synthesis, Architecture Capabilities, Product Development, Technology Roadmap

Industry

Semiconductor Manufacturing

Description
Develop and optimize ASIC architecture and design, ensuring flawless execution. Perform synthesis and logic design tasks to strictly meet project specifications. Write detailed block-level specifications to guide development. Collaborate on backend synthesis and physical design flow, ensuring seamless integration. Validate proof of concept and investigate new architecture capabilities to determine their feasibility. Successfully implement new architecture capabilities into product development, advancing our technology roadmap. Master's degree in electrical engineering or computer engineering, or BS with of 10 years of experience. 8 years Proven proficiency in Verilog/System Verilog. Scripting languages for automation with at least 5 years of proven experience ears experience. Strong analytical and problem-solving skills to tackle complex challenges. Ability to work independently and collaboratively as part of a team. Good understanding of computer system and processing architecture. Excellent communication skills to effectively share ideas and updates. 8 years' experience with advanced ASIC design tools and methodologies. 5 years of solid understanding of backend synthesis and physical design flows. Familiarity with high-level synthesis (HLS) tools. Proven track record in transitioning new architectures into successful products.
Responsibilities
Develop and optimize ASIC architecture and design while ensuring flawless execution. Collaborate on backend synthesis and physical design flow, validating new architecture capabilities and implementing them into product development.
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