Start Date
Immediate
Expiry Date
19 May, 26
Salary
0.0
Posted On
18 Feb, 26
Experience
10 year(s) or above
Remote Job
Yes
Telecommute
Yes
Sponsor Visa
No
Skills
ASIC RTL Design, Verilog, System Verilog, GitHub Copilot, RTL Implementation, Verification, Design Reviews, Mentorship, Low-Power Design, High-Speed Interfaces, Python, TCL
Industry
Semiconductor Manufacturing