Senior Technologist, Mask Design Engineering ((Extensive IC Layout Design-1 at Sandisk

Bengaluru, karnataka, India -

Full Time

Start Date

Immediate

Expiry Date

14 Jun, 26

Salary

0.0

Posted On

16 Mar, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Layout Design, Optimization, Design Verification, DRC, LVS, Parasitic Extraction, Sign-off Methodologies, Power Distribution, Floorplanning, Cross-Functional Collaboration, Layout Automation, Team Management, Analog Circuit Layout, Digital Circuit Layout, Mixed-Signal Layout, IC Layout Design

Industry

Semiconductor Manufacturing

Description

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Job Description Key Responsibilities – Mask Design Technologist Layout Design & Optimization: Develop and optimize peripheral and core circuit layouts for Analog, Digital, and Mixed-signal domains, ensuring adherence to design specifications, performance requirements, and foundry rules. Design Verification: Perform DRC (Design Rule Check) and LVS (Layout Versus Schematic) verification, parasitic extraction, and sign-off methodologies to guarantee design integrity and first-pass success. Power Distribution & Floorplanning: Analyze and implement full-chip power distribution strategies and floorplanning optimization to ensure efficient electrical performance, minimize parasitics, and reduce die size. Cross-Functional Collaboration: Work closely with design and process engineering teams across multiple sites to resolve issues, align methodologies, and drive project success while maintaining high standards of accuracy and consistency. In this senior leadership role, you will lead the development of advanced mask layouts for next-generation memory technologies, strengthening our company’s position as a leader in the semiconductor industry. Qualifications Your Experience and Role Expectation Extensive IC Layout Design: Over 18 years of proven expertise in custom full-chip layouts across analog, digital, and mixed-signal domains, with deep understanding of power distribution and signal planning. Tool Proficiency: Highly skilled in industry-standard layout verification tools (DRC/LVS, parasitic extraction, and sign-off methodologies). Floorplanning Expertise: Strong background in floorplanning strategies and placement optimization to minimize parasitics and reduce die size using a correct-by-construction approach. Cross-Functional Collaboration: Adept at working with multi-site, cross-disciplinary teams and managing small teams to drive project success. Communication & Methodology: Strong verbal and written communication skills with knowledge of layout automation techniques and a proactive mindset toward continuous improvement and efficiency. Leading and building team which helps solving business problems across organzations Additional Information Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at [email protected] to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying. Job Type (exemption status): Exempt position - Please see related compensation & benefits details below Business Function: Mask Design Engineering Work Location: Bangalore PTP Office (IBP)--LOC_WDT_IBP

Responsibilities

The role involves developing and optimizing peripheral and core circuit layouts for Analog, Digital, and Mixed-signal domains while ensuring adherence to design specifications and foundry rules. Key tasks include performing comprehensive design verification checks like DRC and LVS, and implementing full-chip power distribution strategies.