Senior Technologist, VLSI Design Engineering at Sandisk

Bengaluru, karnataka, India -

Full Time

Start Date

Immediate

Expiry Date

29 Jan, 26

Salary

0.0

Posted On

31 Oct, 25

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

VLSI Design, IO Design, High Speed Design, NAND Flash Design, ESD, Powerbus, Floor Plan, Layout Guidelines, DDR Algorithms, Clock Skew Techniques, Team Management, Stakeholder Management, Signal Integrity, Spice Tools, Hspice, Finesim

Industry

Semiconductor Manufacturing

Description

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Job Description Technically Lead team of experienced IO Design Engineers Strategic development of next generation IO for scaling speed Build Best in Class IP Design Handling BU communication on all IO Roadmap, RMA, FA Drive E/E IO Design capability and execution till Silicon to Productization Capability (technical/leadership skills) to drive IO Design in project as Project Lead Qualifications Bachelors/Masters degree in Electronics & Telecommunication/Electrical engineering (VLSI Design) Extensive Hands-on design experience in IO Design High Speed Design concepts (LVCMOS, HVCMOS, DDR, LVDS) 20+ years of Experience on managing/leading/architecting IO designs, projects working with BU, Stake holders NAND Flash Design knowledge is plus Expertise in ESD, Powerbus, Floor plan, Layout guidelines Expertise, knowledge of advanced DDR algorithms : Training modes and DFE/CTLE/Compensation Techniques, Clock skew techniques Technical and also capable to manage Team of IO engineers Experience in working with cross geo, cross team functions and stake holder management Expertise with package/board/Power integrity /signal integrity constraints is a plus. Strong communication skills & circuit design knowledge is preferred. Tool knowledge: spice tools: finesim, hspice & other flows Additional Information Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at [email protected] to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.

Responsibilities

Lead a team of experienced IO Design Engineers and drive the strategic development of next-generation IO for scaling speed. Manage communication with business units regarding the IO roadmap and ensure execution from silicon to productization.