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Senior VLSI Verification Engineer at NeuReality
Tel Aviv, Tel-Aviv District, Israel -
Full Time

Start Date

Immediate

Expiry Date

28 Feb, 26

Salary

0.0

Posted On

30 Nov, 25

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

VLSI, Verification, SoC, System Verilog, UVM, Functional Verification, Packet Processing, Ethernet, RDMA, InfiniBand, SoC Architecture, CPU Subsystems, Multi-Core Designs, Formal Verification, Emulation, FPGA Prototyping

Industry

Semiconductor Manufacturing

Description
We are looking for a Senior Verification Engineer to be a significant part in developing a complex and innovative SoC chip in a start-up company. Taking full ownership of entire domain, defining the verification strategy, writing, and executing verification plan in system Verilog UVM. About Us: VLSI group is responsible for the development of NeuReality next generation SoC for AI Compute. The development starts from product definition through architecture, design, verification and up to implementation. The complex SoC is a high-performance device running AI compute for vision and audio processing, with technologies from multi-disciplines. Requirements 5+ years of experience as a Verification Engineer. B.Sc./M.Sc. in Electrical/Computer Engineering from a leading university. Strong knowledge of System Verilog and UVM methodology. Experience in pre-silicon functional unit level/cluster/full chip verification. Experience in verification of packet processing/Ethernet/RDMA/InfiniBand Familiarity with SoC architecture, CPU subsystems, and multi-core designs. Advantages Knowledge of formal verification and emulation/FPGA prototyping. Exposure to AI/Networking workloads and performance validation.
Responsibilities
The Senior Verification Engineer will take full ownership of the verification domain, defining the verification strategy and executing the verification plan. This role is crucial in developing a complex SoC chip for AI compute applications.