Server Memory Validation Lead at Advanced Micro Devices, Inc

Pudong, Shanghai, China -

Full Time

Start Date

Immediate

Expiry Date

28 Apr, 26

Salary

0.0

Posted On

28 Jan, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

System Validation, DDR Interfaces, Leadership, Vendor Management, Debugging, Communication, Programming, Data Analysis, Process Enhancement, Project Management, Test Plans, Collaboration, Risk Management, Innovation, Automation Tools, Electrical Testing

Industry

Semiconductor Manufacturing

Description

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: As a Principal Member of Technical Staff (PMTS), you will play a pivotal role in the enablement and validation of memory interfaces for cutting-edge processor silicon. Your responsibilities will include leading efforts to innovate, test, and debug within the memory sub-system of new processors, as well as consistently interacting and collaborating with memory vendors. A key part of your role will involve the enablement, debugging, and qualification of these vendors to be included in the Approved Vendor List (AVL). This role requires advanced technical expertise, leadership, and strategic vision to drive efficiencies and quality improvements. THE PERSON: We are seeking a visionary and experienced system validation engineering leader to guide our memory sub-system validation efforts for AMD Server products. The ideal candidate will possess profound knowledge in system validation with a focus on DDR interfaces and demonstrate exceptional leadership capabilities. Additionally, they should have a proven track record in vendor management and qualification. Excellent communication skills, a proactive approach, and a commitment to excellence and innovation are essential. KEY RESPONSIBILITIES: Strategic Leadership: Lead, mentor, and manage a high-performing team of validation engineers dedicated to memory sub-system validation on AMD Server platforms. Technical Excellence: Provide strategic technical direction and leadership in the development of sophisticated test and validation plans for DDR interfaces. Execution and Innovation: Design and implement comprehensive system-level memory sub-system validation test plans across AMD products, continually seeking innovation. Cross-functional Collaboration: Facilitate collaboration with silicon design teams, firmware, software, and automation teams to ensure smooth integration and validation processes. Vendor Interaction & AVL Qualification: Consistently interact and collaborate with local memory vendors for enablement, debugging, and qualification to be included in the Approved Vendor List (AVL). Risk Management: Deliver insightful project reports, analyze risks, and propose innovative solutions, ensuring timely resolution and strategic foresight. Data-Driven Optimization: Utilize smart data analysis to constantly refine processes, enhance efficiency, and drive quality improvements across validation methodologies. Process Enhancement: Identify strategic opportunities to elevate validation processes, enhance automation tools, and drive methodologies for improved efficiency and effectiveness. PREFERRED EXPERIENCE: A Master’s degree with 10+ years of experience or a Bachelor's degree with 12+ years of demonstrated expertise in the development & execution of platform level electrical & functional test plans. DDR/GDDR/LPDDR Memory test experience on electronic components such as Processors would be considered a big plus. Extensive hands-on experience and profound expertise in debugging I/O interfaces such as DDR memory systems. Proven experience in vendor management and AVL qualification processes. Thorough familiarity with signal measurement equipment, schematics, and layout documentation. Exceptional written and verbal communication skills, adept at conveying complex technical information. Advanced programming skills in Python, Ruby, Perl, or similar languages. Demonstrated self-motivation, strategic thinking, and program management skillsets, with a focus on innovation and team leadership. #LI-CC1 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

Responsibilities

Lead and manage a team of validation engineers focused on memory sub-system validation for AMD Server platforms. Collaborate with various teams and vendors to ensure effective integration and qualification processes.