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SIA MAS Engineer at Micron Technology
Hiroshima, , Japan -
Full Time

Start Date

Immediate

Expiry Date

22 Jan, 26

Salary

0.0

Posted On

24 Oct, 25

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

Process Improvement, Production Control, Semiconductor Equipment, Abnormal Analysis, Lot Scheduling, Production Efficiency, WIP Management, Training, Collaboration, Equipment Evaluation, Cost Reduction, Process Management, Relationship Building, Block Balance Control, Counteractions, Continuous Improvement

Industry

Semiconductor Manufacturing

Description
Establish and improve process condition and technology. Upgrade process capability and reduce production cost. Establish and modify process management projects. Set up process parameters for a variety of semiconductor equipment. Evaluation, promotion and planning of new equipment / materials. Abnormal analysis and improvement. As an expert of MAS, continuously improve the production efficiency through the lot scheduling. To achieve stable and on-plan shipment of wafers, also for the constant operation, execute production control activities for balanced WIP in blocks through the line, collaborating with SIC. Along the production control related system/BKM release, carry out the required trainings and provide the supports to the shift team members. Continuous improvements/supports follow. By establishing solid relationship with related groups, mainly shift production and area MEs, minimize the lots stagnancy in production line Be responsible and pursue for MAX out and CT reduction. Support the shift team for block balance control work, identify detractors, and execute counteractions on MAS. work experience with MAS
Responsibilities
The SIA MAS Engineer is responsible for establishing and improving process conditions and technology to enhance production efficiency and reduce costs. This role involves managing process parameters for semiconductor equipment and collaborating with various teams to ensure stable production and shipment of wafers.