Silicon Design Verification Engineer (AI debug/analysis) at Advanced Micro Devices, Inc

Taipei, , Taiwan -

Full Time

Start Date

Immediate

Expiry Date

19 Aug, 26

Salary

0.0

Posted On

21 May, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

AI Debugging, ASIC Design Flow, Verilog, System Verilog, UVM, Power-aware Simulation, Firmware/Hardware Co-verification, AMBA, AXI, APB, AHB, Formal Verification, RTL Coding, Functional Verification, Object-oriented Verification, Problem-solving

Industry

Semiconductor Manufacturing

Description

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: Push Boundaries, Deliver Innovation and Change the World! In this role, you will be given an opportunity to work on the next-generation technology that will be part of future AMD SoCs. This team is also responsible for the Design and Verification of several critical components as well as the integration with other subsystems and the SoC. The Design and Design Verification groups within this team are also responsible for developing a balanced architecture between power consumption and performance, delivering high complexity RTL code, and creating advanced testbenches using cutting-edge verification techniques. KEY RESPONSIBILITIES: Collaborate with the design team to understand and define verification requirements for high-speed, low-power digital circuit designs from definition to implementation. Own or be involved in all aspects of the functional verification from initial test planning, test creation, and debug. to coverage and sign-off closure, while providing technical leadership to the team. Own verification of high-speed, low-power digital designs at the IP and System level using both coverage-driven constraints, random, and directed testing techniques, as well as formal verification. Implement test benches and components, such as test and sequence libraries, monitors, models, and BFMs, using object-oriented verification techniques aligned with the UVM methodology. PREFERRED EXPERIENCE: AI debug/analysis experiences is a must Advanced knowledge of ASIC Design flow and state of the art verification flow Proficient with Verilog, System Verilog, and UVM Proficient in power-aware simulation and firmware/hardware co-verification Familiar with industry standard interconnects such as AMBA (AXI, APB, AHB) Familiar with industry protocols such as ACPI, GPIO, CLK, UART/DMA, SPI/eSPI, I2C/I3C is a plus Familiarity with industry-standard high-speed protocols such as USB and PCIE is a plus Strong analytical and problem-solving skills with pronounced attention to detail Capable of independently driving tasks and activities to completion in an organized and timely manner with excellent quality Strong AI coding and debugging experience ACADEMIC CREDENTIALS: Major in EE, CS, or related, Master's Degree with 7 years or Bachelor's with 9 years of working experiences Location: Hsinchu/Taipei #LI-IH1 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

Responsibilities

Collaborate with design teams to define and implement verification requirements for high-speed, low-power digital circuits. Own the full functional verification lifecycle from test planning and creation to coverage sign-off using UVM methodology.