SIPD Team Leader – Signal Integrity & Power Delivery at Altera

Jerusalem, Jerusalem District, Israel -

Full Time

Start Date

Immediate

Expiry Date

10 Jan, 26

Salary

0.0

Posted On

12 Oct, 25

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Signal Integrity, Power Delivery, High-Speed Interfaces, Electromagnetic Theory, Transmission Line Principles, SI/PI Methodology, Feasibility Studies, Design Verification, Lab Correlation, PDN Analysis, Chip-Package-PCB Co-Design, SERDES Architecture, Ethernet Protocols, PCIe Protocols, HFSS, MATLAB

Industry

technology;Information and Internet

Description

Job Details: Job Description: What You’ll Be Doing: As a Signal Integrity & Power Delivery (SIPD) Team Leader, you will lead and contribute to the design and analysis of high-speed interfaces across silicon, package, and board levels. You will collaborate with cross-functional teams to ensure robust signal and power integrity throughout the product lifecycle. Key Responsibilities: Lead SIPD activities across silicon, package, and PCB domains. Collaborate with analog design, layout, silicon integration, mechanical, and system teams. Provide implementation guidelines and feedback to silicon, package, board, and system design groups. Design and simulate high-speed SerDes signals (128Gbps+), including chip-package-PCB co-design using HFSS and other tools. Perform feasibility studies, design verification, and lab correlation for signal integrity. Conduct PDN analysis including model generation and time-domain simulation. Optimize chip bumpout and ballout in close collaboration with backend, package, and board teams. Contribute to SERDES architecture definitions for Ethernet, PCIe, and similar protocols (100G+). Define and document platform design guidelines for SIPD. Qualifications: Required: B.Sc. in Electrical Engineering. 7+ years of relevant experience in signal and power integrity. Strong understanding of electromagnetic theory and transmission line principles. Experience in SI/PI methodology development, Full system signal integrity analysis, PDN modelling from die through package to PCB. Proven ability to perform full-system SI analysis and PDN modeling from die to PCB. Demonstrate experience in high speed serial I/O channel design, including Ethernet C2C, C2M, KR and CR channels or similar. Preferred: M.Sc., or Ph.D. in Electrical Engineering. Experience with high-speed signals (>50Gbps). Familiarity with tools such as HFSS, MATLAB, Python, SIwave, PowerSI, PowerDC, ADS, Redhawk, Totem, HSpice. Knowledge of signal integrity standards for Ethernet, PCIe, and similar protocols up to 100Gbps. Work Location: This position offers flexibility in work location. The selected candidate may choose to work from any of our sites: Jerusalem, Haifa, or Kiryat Ono. Job Type: Regular Shift: Shift 1 (Israel) Primary Location: Jerusalem, Israel Additional Locations: Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. About Altera Altera: Accelerating Innovators Altera provides leadership programmable solutions that are easy-to-use and deploy in applications from cloud to edge, offering limitless AI possibilities. Our end-to-end broad portfolio of products including FPGAs, CPLDs, Intellectual Property, development tools, System on Modules, SmartNICs and IPUs provide the flexibility to accelerate innovation. Altera is helping to shape the future through pioneering innovation that unlocks extraordinary possibilities for everyone on the planet. Don't see the dream job you are looking for? Click "Get Started" below to drop off your contact information and resume and we will reach out to you if we find the perfect fit.

Responsibilities

Lead and contribute to the design and analysis of high-speed interfaces across silicon, package, and board levels. Collaborate with cross-functional teams to ensure robust signal and power integrity throughout the product lifecycle.