SMTS Design Engineer, NVEG at Micron Technology

San Jose, California, United States -

Full Time

Start Date

Immediate

Expiry Date

07 Apr, 26

Salary

347000.0

Posted On

07 Jan, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

IO Design, Signal Quality Optimization, CMOS Technology, Technical Documentation, Mentoring, EDA Tools, Python, Matlab, Physical Design, High-Speed Interfaces, Power Integrity, Chip Architecture, NAND Flash Memory, Product Validation, Post Silicon Activity, Industry Standards

Industry

Semiconductor Manufacturing

Description

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Overview The Non-Volatile Engineering Group at Micron contributes to the development of memory products that are best-in-class in terms of die size, performance, reliability, and power. Our NVEG organization is dedicated to advancing non-volatile memory technologies such as NAND. Our primary mission is to innovate and develop groundbreaking solutions that improve the performance and reliability of non-volatile memory products. Position Overview The Senior Member of Technical Staff Design Engineer in Micron’s NVEG organization contributes to the development of new memory products by assisting with the overall design, layout, and optimization of datapath circuits for NAND flash memory. This senior-level position will support design feasibility studies, evaluate impacts, and explore innovative solutions and improvements to drive product competitiveness. We are seeking an experienced professional who will prioritize measurable impacts and is driven by results. This position is intended to be part of Micron's Technical Leadership Program (TLP). This is a career path for individuals seeking to advance as technical leaders and industry innovators. TLP members are expected to influence, lead, and mentor others. Responsibilities Design key IO design building blocks (e.g. input receiver, equalizer, SerDes, Clock distribution circuits) to meet specifications and validate functionality and performance Model parasitics and optimize signal quality in close collaboration with layout teams Optimize circuit design based on a comprehensive understanding of CMOS technology and reliability Document and review final results with experts and stakeholders Maintain technical expertise, stay informed on industry trends, and provide training to the product validation team on design architecture and features Set individual objectives according to the team’s growth and milestones, manage performance reviews, and help shape strategic decisions Minimum Qualifications BS in Electrical Engineering, MS or PHD preferred Required 13+ years of relevant experience in the semiconductor industry working directly with memory product design Deep knowledge and understanding of high-speed IO circuits performance, power and area optimization, chip architecture/floorplan Demonstrated experience in leading and mentoring others to impact organizational effectiveness and knowledge-sharing Ability to convey complex technical concepts in verbal and written form; Patents and publications are a plus. Familiarity with full-custom EDA tools (e.g. cadence, hspice, XA, verilog), plus Python and Matlab for design flow automation Advanced expertise in physical design flows and optimization Ability to work effectively both as a collaborator and individual contributor Preferred Qualifications Knowledge and understanding of SerDes, wave pipeline circuits 10+ years experience with signal/power integrity, power delivery network design, physical design Experience with post silicon activity such as providing training on product validation and implementing design fixes under constraints Experience with CMOS BSIM models and creating CMOS targets for IO roadmap 10+ years experience with high-speed interfaces for NAND as well as DRAM (e.g. LPDDR5/LPDDR6) and other industry standard interfaces Recognized contributions to industry standards, patents, and published technical papers The US base salary range that Micron Technology estimates it could pay for this full-time position is: $159,000.00 - $347,000.00 a year Additional compensation may include benefits, bonuses and equity. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position across all US locations. Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training. The pay scale is subject to change depending on business needs. Your recruiter can share more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits. Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws. To learn about your right to work click here. To learn more about Micron, please visit micron.com/careers US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron’s People Organization at hrsupport_na@micron.com or 1-800-336-8918 (select option #3) Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification. Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.

Responsibilities

The Senior Member of Technical Staff Design Engineer will design key IO building blocks for NAND flash memory and optimize circuit designs. This role involves collaborating with layout teams and documenting results while mentoring others.