SOC Design - STA, Hardware Compute Group at Amazon SZ South 3 GmbH

Sunnyvale, California, United States -

Full Time

Start Date

Immediate

Expiry Date

17 Jan, 26

Salary

212800.0

Posted On

19 Oct, 25

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

SoC Design, STA, Timing Analysis, Crosstalk Delay, Crosstalk Noise, Timing Signoff, Debugging, Verification, ARM, DSP ISAs, RF Standards, Automation, Python, Perl, Mixed Signal, Full Chip Timing

Industry

Software Development

Description

The team that built the innovative Silicon IP AZ1 Neural Edge that is powering the latest generation of Echo devices is looking for a Senior SoC Design-STA Engineer to continue to innovate on behalf of our customers. We are a part of Amazon Lab126 that revolutionized reading with our Kindle family of products and reimagined user experience through Echo and Alexa. We want you to help us build on the success of our first generation of ML accelerator at edge. Work hard. Have fun. Make history. Key job responsibilities • Includes definition and development of signoff methodology and corresponding implementation solution • Flow for STA, Crosstalk Delay and Crosstalk Noise analysis for digital ASIC/SoCs. • Full chip timing constraints development, full chip / Sub-System STA and Signoff for a complex, multi-clock, multi-voltage SoC. • Streamlining the timing signoff criterions, timing analysis methodologies and flows. • Analyze and incorporate advance timing signoff flows (AOCV, POCV Based STA, IR Drop aware STA) into SoC timing signoff flow. • Work for Systems and Architecture, SoC Integration, Verification, DFT, Mixed Signal, IP owners, Synthesis, Place & Route and other local/remote teams to address the design challenges in the context of timing sign-off. • Concepts of CRPR, clock paths analysis and tweaks to meet timing. • Multi Corner and Multimode analysis. • Close timing at Signoff corners covering the entire modes, delay corners for cells and interconnects. Basic Qualifications: - Bachelor's degree in Electrical Engineering or a related field - Experience identifying bugs in architecture, algorithms, functionality, and performance with strong overall debugging skills - Experience verifying at multiple levels of logic from IP blocks to SoCs to full system testing Preferred Qualifications: - Master's degree in Electrical or Communications Engineering or a related field - Experience with formal verification techniques including abstraction and end-to-end checking - Experience with ARM and various DSP ISAs - Experience with current and upcoming RF standards in cellular (4G/5G NR), WiMAX, 802.11ad, microwave backhaul, or related broadband wireless standards - Experience with industry standard tools and scripting languages (Python or Perl) for automation Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company’s reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations [https://amazon.jobs/content/en/how-we-hire/accommodations] for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner. Our compensation reflects the cost of labor across several US geographic markets. The base pay for this position ranges from $129,800/year in our lowest geographic market up to $212,800/year in our highest geographic market. Pay is based on a number of factors including market location and may vary depending on job-related knowledge, skills, and experience. Amazon is a total compensation company. Dependent on the position offered, equity, sign-on payments, and other forms of compensation may be provided as part of a total compensation package, in addition to a full range of medical, financial, and/or other benefits. For more information, please visit https://www.aboutamazon.com/workplace/employee-benefits [https://www.aboutamazon.com/workplace/employee-benefits]. This position will remain posted until filled. Applicants should apply via our internal or external career site.

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Responsibilities

The role involves defining and developing signoff methodology and implementing solutions for STA, Crosstalk Delay, and Crosstalk Noise analysis for digital ASIC/SoCs. The engineer will collaborate with various teams to address design challenges in the context of timing sign-off.