QUALIFICATIONS:

• B.S. or M.S. in Electrical Engineering or related field.
• 5–10 years of experience in AMS verification for custom ICs.
• Deep understanding of analog circuits (e.g., LDOs, comparators, oscillators, amplifiers, regulators) and digital interfaces (PMBus, AVSbus, I2C/SPI).
• Proficiency with AMS simulation tools: Cadence AMS Designer, Xcelium, Spectre, Verilog-AMS, and SystemVerilog.
• Strong knowledge of verification methodologies (custom analog flows).
• Familiarity with scripting (Python, Perl, SKILL, etc.) to automate simulations and analysis.

ROLE OVERVIEW

To expand our team in Munich we are looking for a Senior AMS Design Verification Engineer with deep experience in verifying complex analog/mixed-signal circuits in advanced CMOS technologies. This role involves developing and maintaining verification environments to ensure first-silicon success of high-performance power ICs, including mixed-signal voltage regulators.
You will work closely with design and digital teams in a collaborative environment.

KEY RESPONSIBILITIES

• Defining chip-level verification plans to ensure coverage of specified features
• Develop and execute AMS verification strategies for analog/mixed-signal power ICs (regulators, drivers, control loops, bias generators, etc.).
• Create testbenches using Verilog-AMS, SystemVerilog, and SPICE models to validate circuit behaviour across corners and use cases.
• Build behavioural models of analog blocks for top-level simulation and integration with digital RTL.
• Collaborate closely with analog designers, digital verification, and firmware teams to ensure comprehensive coverage and functional robustness.
• Manage regression flows and verification tracking