Start Date
Immediate
Expiry Date
06 Sep, 26
Salary
336000.0
Posted On
08 Jun, 26
Experience
5 year(s) or above
Remote Job
Yes
Telecommute
Yes
Sponsor Visa
No
Skills
Logic Design, SystemVerilog, Static Timing Analysis, Synthesis, Timing Closure, GenAI, Agentic MCP, PCIe, NVMe, DRAM, NAND Interfaces, AXI, CPU Architecture, Bus Protocols, CDC, Linting
Industry
Semiconductor Manufacturing